mosfetmosfet-driver
I am trying to simulate high side MOSFET in Proteus using gate driver IC IR2112 but it does not work as expected when HIN is high. The mosfet should be turned ON when gate voltage is more than 10V but it gives across R4 the same voltage Vc as applied to IC pin 3 when HIN is high. I need to learn how to overcome the mentioned problem.
Yes, the 1K gate-to-source resistor is creating your problem. The good news is, you don't need it. A gate-to-source resistor is needed if your MOSFET cannot be actively driven off when it is needed to be, but that is not the case with the IR2101. You will often see a gate-to-source resistor used when a MOSFET gate is connected to a microcontroller to force the MOSFET off until the microcontroller can initialize the pin as an output.
Here is the datasheet for IR2101. And here is the Functional Block Diagram (from the datasheet):
As you can see from the functional block diagram, the gate drive outputs HO and LO are actively driven both high and low so the 1K ohm resistor is not needed.
The problem that you are seeing is that the bootstrap capacitor is being discharged through the 1K ohm resistor (in series with the 100 ohm resistor). From looking at the decay rate on your waveform, it looks as though that waveform was captured with only the 330nF capacitor in place (using the formula T=RC to get the time-constant).
I am not sure the term v-offset has universal meaning. The best way to tell is to look at the Recommended Operating Conditions (on page 2 of the datasheet), it listed Vs (a specific pin label) can operate up to 500V max. In conjunction with a note above that all voltages are referenced to COM, it is a positive indication that the driver is designed to operate up to 500V.
On page 3 of the datasheet, there are specifications of the "IN" pin -- VIH and VIL indicate 5V TTL levels; I-in+ and I-in- indicate low current requirements meaning it can be driven by any logic output.
t-on and t-off are propagation delays and have some bearings on the maximum frequency, they are also important when you have to time a bridge to minimize shoot-thru. But for the overall maximum switching speed of the MOSFET, the rise and fall time (t-r, t-f) play bigger roles. In most cases, you don't want to operate near the "maximum" switching rate because it would be too inefficient, and also too "non-linear" if that is important.
The current limit feature operate by sensing the voltage difference between the CS and Vs pins. The threshold values are given on page 3 as V-CSTH+ and V-CSTH-, with the typical value being 0.23V. As an example, connect a 0.1 ohm resistor from CS to Vs as in the diagram on the first page. When the current through the resistor gets to 0.23V/0.1ohm = 2.3A, the current limit would kick in and turn off the HO pin.
It is a cheaper circuit for low side. The gate drive (and supply) voltage has to match that of the MOSFET and is not necessarily 5V.
Best Answer
The IR2112 uses a charge pump (C2 and D1) to increase Gate drive voltage. For this to work properly you must apply PWM to HIN, which keeps C2 charged up.
Each time the FET turns on it pulls the load voltage high. Since C2 is already charged up to nearly 15V, and D1 stops it from discharging into the 15V supply, the boost voltage at VB will go up to almost 15V above the FET's Drain voltage (ie. to about 115V). The driver then switches between this boost voltage and VS, providing close to 15V Gate drive to the FET even though it is way above VC. C2 will loose some charge through the gate drive circuit, but when the FET is turned off again (during PWM off time) it is recharged through the load (R4).
If you hold HIN high continuously then C2 will continue to discharge through R1 and R2. Eventually the drive voltage will drop below the FETs threshold voltage and it will start to turn off, then boost voltage will drop and you will be left with only the 15V from VS. The load voltage will drop even lower because the IRF840 needs about 6V to turn on.
Another potential problem with your circuit is that C2 is being discharged through R1 and R2 almost as fast as it is being charged through R4. Over many PWM cycles the average voltage on C2 will drop, reducing Gate drive. At 50% PWM or above the drive voltage might drop below the FETs threshold voltage, causing it to turn off too soon. This can be fixed by either increasing the value of R2 or reducing the value of R4.