CAN sounds the most applicable in this case. The distances inside a house can be handled by CAN at 500 kbits/s, which sounds like plenty of bandwidth for your needs. The last node can be a off the shelf USB to CAN interface. That allows software in the computer to send CAN messages and see all the messages on the bus. The rest is software if you want to present this to the outside world as a TCP server or something.
CAN is the only communications means you mentioned that is actually a bus, except for rolling your own with I/O lines. All the others are point to point, including ethernet. Ethernet can be made to logically look like a bus with switches, but individual connections are still point to point and getting the logical bus topology will be expensive. The firmware overhead on each processor is also considerably more than CAN.
The nice part about CAN is that the lowest few protocol layers are handled in the hardware. For example, multiple nodes can try to transmit at the same time, but the hardware takes care of detecting and dealing with collisions. The hardware takes care of sending and receiving whole packets, including CRC checksum generation and validation.
Your reasons for avoiding PICs don't make any sense. There are many designs for programmers out there for building your own. One is my LProg, with the schematic available from the bottom of that page. However, building your own won't be cost effective unless you value your time at pennies/hour. It's also about more than just the programmer. You'll need something that aids with debugging. The Microchip PicKit 2 or 3 are very low cost programmers and debuggers. Although I have no personal experience with them, I hear of others using them routinely.
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I see some recommendations for RS-485, but that is not a good idea compared to CAN. RS-485 is a electrical-only standard. It is a differential bus, so does allow for multiple nodes and has good noise immunity. However, CAN has all that too, plus a lot more. CAN is also usually implemented as a differential bus. Some argue that RS-485 is simple to interface to electrically. This is true, but so is CAN. Either way a single chip does it. In the case of CAN, the MCP2551 is a good example.
So CAN and RS-485 have pretty much the same advantages electrically. The big advantage of CAN is above that layer. With RS-485 there is nothing above that layer. You are on your own. It is possible to design a protocol that deals with bus arbitration, packet verification, timeouts, retries, etc, but to actually get this right is a lot more tricky than most people realize.
The CAN protocol defines packets, checksums, collision handling, retries, etc. Not only is it already there and thought out and tested, but the really big advantage is that it is implemented directly in silicon on many microcontrollers. The firmware interfaces to the CAN peripheral at the level of sending and receiving packets. For sending, the hardware does the colllision detection, backoff, retry, and CRC checksum generation. For receiving, it does the packet detection, clock skew adjusting, and CRC checksum validation. Yes the CAN peripheral will take more firmware to drive than a UART such as is often used with RS-485, but it takes a lot less code overall since the silicon handles so much of the low level protocol details.
In short, RS-485 is from a bygone era and makes little sense for new systems today. The main issue seems to be people who used RS-485 in the past clinging to it and thinking CAN is "complicated" somehow. The low levels of CAN are complicated, but so is any competent RS-485 implementation. Note that several well known protocols based on RS-485 have been replaced by newer versions based on CAN. NMEA2000 is one example of such a newer CAN-based standard. There is another automotive standard J-J1708 (based on RS-485) that is pretty much obsolete now with the CAN-based OBD-II and J-1939.
Let's get some terms straight first: An Ethernet interface is typically made from two parts: a MAC and a PHY. The MAC, Media Access Controller, handles all of the packet assembly, transmission, reception, and error checking. A PHY handles all of the PHYsical transport stuff like modulating the signal, managing the DC balancing, tracking baseband wander, etc.
There are some things that both sides do, to some extent. Both MAC and PHY do some level of data error detection. This is not redundant error detection, but just error detection that is related directly to the types of things that the MAC and PHY do. Also, both MAC and PHY are dependent on the packet nature of Ethernet. The MAC because it is using the packet nature to filter, route, and manage the data. The PHY because there are certain signal modulation/demodulation functions that require packets (and the space between packets) to function correctly.
The point is: You cannot get away from packets even if you just use the PHY. Of course, the packet headers do not have to be "standard" headers. And the CRC does not have to be a standard CRC. But you are still limited to the maximum packet length and inter-packet-gap that standard Ethernet requires. (Note: You might be able to do "jumbo" packets if both PHYs support it.)
There are many benefits to using standard Ethernet packet headers, however. We would refer to this as a "Layer 2" protocol. The main benefit is that you can use standard Ethernet switches to help connect different devices together.
You mention just connecting a "TDM stream" directly (more or less) to the PHY. Every time someone has said that to me they have been talking about running multi-channel digital audio over Ethernet. If that is the case then you have a bunch of other issues, like clock synchronization and error detection that will prevent you from doing it the easy way. I won't cover audio over Ethernet more in this answer, but tell me if that is what you want to do because I can add a lot more info in that case.
Historically there have been many products that have taken some sort of data stream and ran it over Cat-5 using Ethernet PHYs and FPGAs, but without traditional MACs. Some of them have used the proper Ethernet Layer 2 or Layer 3 packets, and some of them have not. Some have also used non-Ethernet technology like ATM or FDDI. Some of them have used FPGA's, but inside the FPGA is a more traditional CPU and MAC.
I hope that at this point you have realized that what you want to do (use an FPGA and PHY to transfer a data stream over Cat-5) is difficult. Not impossible, but difficult. Let me try to explain how difficult.
First, you will have to master FPGA logic design. Of all the professional FPGA logic designers I know of, this project is beyond the ability of maybe 95% of them. These are people who have been designing FPGAs for several years or even several decades. It will take you a long time to learn FPGAs enough to design this logic. Probably years if you are doing this as a hobby.
Next, you need to learn exactly what a MAC and PHY do, and how they interface. This is not as hard as learning FPGAs, but it isn't easy either. There are a lot of basic concepts that are important, but not easily learned.
Now you'll have to design a PCB to do all of this. Designing a reliable PCB that uses FPGAs, PHYs, and does all of the proper Ethernet signal integrity stuff is also not easy. Not super hard either. But on a scale of 1-10, with 1 being super easy, this PCB would be about a 6. Not hard for an experienced professional, but definitely hard for a non-professional-EE.
At this point you probably noticed that I didn't directly answer your questions. This was on purpose. I could answer your questions, but honestly that wouldn't help you. It would be like telling you how to build the second story of a house when you haven't figured out how to build the first story or even the foundation.
Start by learning everything about designing FPGAs that you can. Also learn everything about Ethernet that you can. There are lots of online resources from app notes, datasheets, and how-to's. Go to opencores.org and study their Ethernet MAC cores. Do this diligently and in a year you might be ready. And when you are ready then you will likely know the answers to 75% of your questions-- and you will be able to put the other 25% into proper context so when someone does give you an answer it will actually be useful to you.
Best Answer
You don't want to send a single packet for every sample. That's because the packet has headers as well, and that means inefficiency in the transfer. Putting several samples into a single packet will both increate the efficiency and get you over your minimum packet size. The upper limit on the number of samples is the maximum latency that you can tolerate. At 48kHz, adding one more sample into your packets would increase the latency by ~21\$\mu\$s. You should also calculate the latency introduced by the whole system end-to-end. Having 8-16 samples per packet would increase your efficiency above 70-80%.
I'd go for a microcontroller with a built-in Ethernet MAC. Having a built-in PHY as well would be a nice plus, however, that extra constraint would decrease your choice by large. There many-many microcontrollers with a built-in 100Mbps MAC, but only a few with a built-in PHY as well.