Negative gate pulse to a thyristor

There are 4 quadrant sensitive gate type Thyristors with max voltage ratings and there are 3 quadrant types which are better for commutation and preventing back EMF from false triggering. In both cases, however dv/dt can trigger false latching and low R and medium sized plastic cap called a snubber circuit or LPF for high voltage are required to avoid that.

You can try two discrete transistors to make an SCR and examine the Absolute Maximum Ratings to fully appreciate how this latch works.

from Wiki....

Thank you for letting me explain to assist your learning process..

One must be very cautious when comparing complex semiconductor devices to their "equivalents" which employ less complex semiconductor devices. See for example my answer to this question: "Why can't two series-connected diodes act as a BJT?"

However, in this case I got a feeling that if you'll connect two BJTs in the suggested configuration they will not saturate (therefore acting similarly to thyristor). You're welcome to test this guess by either assembling a real circuit or simulating in Spice. Please let me know if the transistors do saturate.

As for the thyristor, then the fact that it does not turn-on due to leakage currents is quite intuitive (unless you are seeking for a complete explanation involving semiconductor physics)

Let us assume that the Gate is floating:

_{(source: radio-electronics.com)}

When \$V_{AK}>0\$:

• J1 is "forward-biased" (note the quotes)
• J2 is reverse -biased
• J3 is "forward-biased"

Why did I put quotes around "forward-bias"? The junctions are forward-biased, but the voltage is much lower than the usual voltage associated with forward-biased PN diode. In fact, voltages across the forward-biased junctions are very close to 0 - the most of the externally applied voltage is dropped across reverse-biased junction (J2).

In order to turn the thyristor ON, one of the following must occur:

• Breakdown inside reverse-biased junction
• Forward-biasing the bottom PN junction (J3) by a significant voltage, thus causing the "bottom NPN sandwich" to become active.

The first condition can occur for very high \$V_{AK}\$ (turn-on without Gate-Drive).

The second condition can not be satisfied by \$V_{AK}\$, because the majority of the voltage is "eaten" by J2. However, applying bias "below" J2 (bypassing J2) can help because this voltage will not see any reverse-biased PN junctions. This is exactly what happens when Gate is driven with voltage pulse.

Summary:

Thyristor won't be turned-on by leakage currents because the reverse-biased PN junction (J2) consumes most of \$V_{AK}\$, thus leaving forward-biased PN junctions (J1 and especially J3) with insignificant forward-bias. Thyristor will be turned-on when either J2 undergoes breakdown, or there is applied bias bypassing J2 (at Gate electrode).