Proteus/Ares 8 – why does adding ground plane not make ground links disappear

In high frequency microstrip components, the "cavity" (that is, the area to the side of and above the trace) can lead to a lot of radiation in certain circumstances. The ground to the side of the trace can act as a "wall" and help mitigate the radiation (especially in situations where you may want to solder a cover over a sensitive area of the circuit. You can pour ground on the top/bottom with provisions for later soldering on a shield.)

As for the impedance matching, it shouldn't really impact the signal circuit if the pour is more that 2 to 3 times the tracewidth away from the signal trace.

And, a bit of an anecdote, but I've found that the top/bottom pour helps make the copper distribution a bit more symmetrical about the middle layer which helps with flexing over a large operating temperature range (even though the risk of bending at assembly is increased, as you pointed out).

I'm not sure that I know the best way to build the board, but I know what I would do.

1. The location of the 12V-to-5V regulator, whether linear or switching, will not matter. The corner of the board is fine.
2. I would not bother with filling either top or bottom of the board with ground planes. The impedance of the signal traces is defined by the internal planes, not the extra copper you pour on the outside. The extra coper isn't shielding internal signals, all that is underneath are power and ground planes. Instead, connect ground and power pins of components directly, as close as possible to the pin, to the planes.
3. Don't share power and ground vias between different devices. One via per pin minimises noise on the pin and routing distance to the ground plane. If you are so worried about the manufacturing price that a few vias are going to be significant, you must be shipping in very high volume, so you can prototype a dozen different layouts to optimise it. If this is a one-off, the biggest cost risk is that you don't get it right first time, so be conservative and use lots of vias.
4. Put a via by every component ground pin (not necessarily every component signal pin that happens to need routing to ground). Minimum noise on power and ground planes comes from effective decoupling. High frequency noise is minimised by using physically small ceramic capacitors and keeping the power and ground vias close together - underneath the capacitor, if possible. The cross sectional area of the loop from power plane up through via to capacitor, along capacitor and down through via to ground plane, places the lower limit on how effective the decoupling is.
5. I would definitely not put any splits in the ground plane. Instead, if there are analog signals sensitive to noise, I would not route digital signals close to them. I would try and keep those sensitive analog signals just on the top layer if possible, no vias to the bottom at all. If I can isolate an area of sensitive connections all together on the top layer, I would route a single loop of trace all round there on the top layer, and connect that loop at one point with a via to the ground plane. That approach has worked well for me in the past with very sensitive signals.

And finally: it is conceivable that some clever technique of sharing ground connections might help noise in the analog wiring, but you'd need to know the exact circuit and think very hard about it to be confident. These rules of thumb have worked pretty well for me.

Good Luck!