I am new to gate driver design. I am designing a Buck-Boost converter and would like to create a gate driver for the MOSFET. I tried simulating TL494 IC on LTspice but there is no PWM signal at the output. The output at the emitter is always high (= 12 V). I plan to drive the gate of a single MOSFET using the TL494 IC. This is my schematic:
These are from the TL494 datasheet:
The datasheet can be found here.
My LTspice schematic can be found here with the name pulse_generation_imp.asc .
The spice model of the IC was found here.
Questions:
- Why can't I get a PWM output at the emitter?
- I cannot understand the use of two error amplifiers in the IC. It would be very much helpful if someone explained their practical usage in simpler terms. Why are the outputs of the error amplifiers shorted with the feedback input (pin#3)? What does this configuration achieve?
- Will I be able to generate a PWM signal if I grounded all four pins of the error amplifiers and just give the control signal to the feedback pin (pin# 3). In the schematic, I am able to generate a 100 kHz sawtooth signal that goes from 0 V to 3 V. So, if I use voltages from 0 V to 3 V at pin#3, will I be able to vary the duty cycle of the generated PWM signal at the emitter from 0 to 1? (Without ever needing to use the two error amplifiers)
- "Normally resistors (apart from RT (pin#6)) are used in the circuit to limit currents entering the IC". Is this statement correct?
- What does pin#4 (DTC) serve practically? Is there any problem if I ground it? I just need a single PWM output signal to drive the gate of a single MOSFET.
Best Answer
Following the discussion in the comments, I would like to add a few points:
Here the reference voltage Vref (setpoint) is 5V according to the datasheet (pin 14).
If you want to have 10VDC_nom on the output of the buck-boost converter then you need to create a resistive divider bridge to go from 10V to Vref=5V. The output of this divider bridge goes into pin 1, while Vref (pin 14) goes to pin 2 through a resistor.
You then have to place a feedback on the error amplifier. This feedback network (between pin 2 and pin 3) is usually a R-C in series. The values of R and C as well as the values chosen for the resistive divider will impact the dynamic transfer function of the converter. This is called a "compensator network". You will find more detailled information here: https://www.ti.com/lit/an/slva662/slva662.pdf?ts=1672160889532
By doing so, the output of the error amplifier will saturate low while (Vout x G_divider) < Vref. This means the clock of the flip flop will have a low duty cycle, and the duty cycle on the emitter will be high. With a high duty cycle PWM signal for the buck-boost MOSFET, the converter output voltage will increase quickly until (Vout x G_divider) = Vref. At this point the output of the error amplifier stabilizes to a point where the PWM duty cycle reaches the desired value (from the input/output transfer function of the boost converter) and Vout_converter = setpoint.