Question about the registers of an ADC

adcregister

There are two things that confuses me in the below text:

"The ADC uses the successive-approximation method to perform the
conversion.The HCS12 uses two 8-bit registers to hold a ananlog to digital conversion result. The result can be stored either right- or left-justified. The A/D conversion is performed in a sequence from one to eight samples."

1- I always thought that registers are storage locations in the CPU. So ADCs would have their own registers too?

2- What are the functionality and meaning of the right- or left-justified registers?

Best Answer

I always thought that registers are storage locations in the CPU. So ADCs would have their own registers too?

Registers can be storage locations in any device. You'll find the in ADCs, accelerometers, EEPROMs, etc.

What are the functionality and meaning of the right- or left-justified registers?

This implies that the result is less than the 16 bits allocated to it. Suppose the ADC produces a 12 bit result. In the left justified case, it would be shifted to the so the MSB is in the MSB of the 16 bit space, like so:

16         |3|2|1|0
MSB|...|LSB|X|X|X|X

Right justified is the reverse, where the LSB is in the LSB of the 16 bit space.

16|15|14|13|12 |   |0
X | X| X| X|MSB|...|LSB

Related Solutions

Electronic – How to get a linear relationship between a voltage divider and an ADC

You state that at 128, you measure about 500mV. This means at full scale (256) you measure about 1V.

According to the datasheet (14.12) with:

// Set ADC reference to AVCC
ADMUX  |= (1 << REFS0);

You actually do the following:

This bit selects the voltage reference for the ADC, as shown in Table 14-2. If this bit is changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set).

Table 14-2.

Voltage Reference Selections for ADC
REFS0   Voltage Reference Selection
0       VCC used as analog reference.
1       Internal Voltage Reference.

Paragraph 14.3 states:

The ADC converts an analog input voltage to a 10-bit digital value through successive approximation. The minimum value represents GND and the maximum value represents the voltage on VCC or an internal 1.1V reference voltage.

So in conclusion, you are setting the ADC reference voltage to 1.1V and with that knowledge your findings are pretty accurate.

Electronic – Delta Sigma ADC in ADC Pi (MCP3424), how it converts Analog to Digital

Everything you need is in the datasheet for that chip in table 4-2 and 4-4. There is no 17 bit mode, but a twos-complement 18 bit mode. If your gains are set to 1, then

Vref- 1LSB will produce 0b01 1111 1111 1111 1111

-Vref will sample as 0b10 0000 0000 0000 0000

and zero will be all zeros

You must divide Vref by any gain setting other than one you place on the PGA.

Having an 18 bit word come in via I2C means that you'll either be throwing out some LSB's, of reading the data into a 32 bit word. Pay very close attention to pages 23 and 24 so you understand what your data will look like. Since these are twos complement numbers, I recommend SOMEHOW reading them in such that the data is LEFT ALIGNED with your SIGNED 32-bit word, and then you can shift them right if you prefer them right aligned, and the compiler should not have problems dealing with the twos complement format. Note that if you get dealing with twos complement format wrong any numbers that end up negative (even due to noise) will not be handled correctly.

Best Answer

Related Solutions

Electronic – How to get a linear relationship between a voltage divider and an ADC

Electronic – Delta Sigma ADC in ADC Pi (MCP3424), how it converts Analog to Digital

Related Topic