Remainder of a 16-bit number divided by 3

Serial/parallel-load shift registers and bit rotations are going to work most naturally with a D flip flop, since they just send data straight through; binary counters are going to work most naturally with a T flip flop, since each counter bit C_k = C_k,previous XOR carry_k, where carry is the carry bit from the previous stage.

If you look at JK flip-flops, however, they are the "universal" flip-flop that can act as a D- or T- flip-flop depending on the input signals.

To get a D from a T, or vice versa, you need an XOR gate. To get a T from a JK, you just tie the JK inputs together. To get a D from a JK, you need an inverter, as the J/K inputs need to be opposites.

In your application, you've got enough complexity, that I suspect the gate counts are going to be very close, and it's probably not worth worrying about -- unless you have to optimize, in which case you'll just have to try it for each case.

IMHO, the D flip-flop is conceptually the simplest to use, and it works naturally with most of your operations, so I'd start with that.

Yes, this is certainly possible.

From your question it is not clear whether you want a 4-bit comparator that outputs only equality, or the three conclusions as shown for your 1-bit comparator.

This smells of homework, and as a rule we don't give full answers to such questions, but we can gently steer you in the right direction.

Consider the equality. Your 1) text indicates that for a 0 output the conclusion must be 0, for a 1 output the conclusion must be the 'other' input (from the lower bis).

1. which logic gate does this describe?

2. how would you connect this gate to the single bit comparator (you will need one extra input, the 'lower bits are equal' input (often called 'cascade')) Draw the diagram of this one-bit-comparator-with-cascade-input.

3. Now draw the final 4-bit comparator.