It's a hard question to answer as this is more of a debugging thing. But I can contribute some ideas as to what you could try.
The first thing I thought was that your pigtail connections (the 1-2cm loose wires coming out of the cable and onto your board) might be too long for 480 MBps operation. Ideas to try:
- Force your host to run as USB 1.1 (1.5 or 12 MBps). Maybe you can run it through a USB powered hub or something to force it to the lower speed.
- Use a real USB connector, glue it upside down or something, and make really tight short connections from connector pins to the PCB.
- Maybe you can find a way to cut the cable pigtails length to 1/5 or something in that order.
- Make sure you are not testing with the oscilloscope probe attached.
- Maybe try really short and really long USB cable.
- Maybe try changing temperature (warmer makes the edges slower and colder makes the edges faster).
A note to some comments here: Don't worry about number of vias and the length matching of those PCB traces. Done right, vias and a small bit of length mismatch have never been a problem for USB 2.0. And this is insignificant compared to what you do with the cable pigtails.
Some typical general errors to check for include:
- Clocking. Verify clock frequency and jitter is within spec - including any PLL's.
- Power. Verify (with 1-2 GHz BW oscilloscope) that your Vcc ripple is within spec etc.
Also I would not rule out software just yet. Look for differences - like in the config data etc.
And don't be too proud to ask an experienced hardware guy for help :-)
Update - Note on measuring Vcc ripple:
Taken from my answer to this question: How do I verify that my 3.3v power rail meets the requirements for an Ember EM357 SoC?
The best paper I know of that describes how to do this measurement is this one: http://www.electrical-integrity.com/Quietpower_files/Quietpower-21.pdf
In short: Use a coax cable soldered directly to your board. Run the 50R coax into your oscilloscope set to 50R input impedance. Select AC-coupling. A bandwidth that is adequate (minimum 500 MHz). And infinite persistence.
If you make the measurement using a high impedance probe with a long "pig-tail" for ground - you may have extra noise not related to your Vcc noise picked up. When in doubt, always do the null-experiement: touch the probe tip to the ground point, so both tip and ground of the probe touches the same point on the board. If you don't get a flat line, something is being picked up by inductive coupling into the loop formed by probe and ground lead.
So do you have too much noise? Suppose the datasheet of this device calls for 3.3V +/-5% for the Vcc supply. That means you have +/-165mV as the limit. Let's assume you have a 2% accuracy of your 3.3V DC regulator. And let's assume you have a 0-1% distribution drop in the connections between the regulator and the device (cables, connectors, traces, filters etc.). That leaves 2% to the AC-noise/ripple or +/-66mV (132mVpp).
That means as long as I use USB signals on the mPCIe connector, I am conform to the PCIe standard, although I donĀ“t use PCIe?
Yes, as you are not obligated to implement the full sets of mPCIe connections. A good portion of manufacturers have implemented usb only slots, while another portion tend to have two slots per board, one full and one usb only, due to its convenient connector for internal, modular usb devices (wifi, bluetooth most common).
Best Answer
Generally speaking, unused PCIe data lanes should be left unterminated. This will apply to mini-PCIe as well.
PCIe transmitters use a receiver detection scheme which looks for a the termination impedance of the receivers to determine whether or not anything is connected. If no termination is detected, the transmitters are placed in an electrical idle state whereby the line voltages are held constant - there is no switching and therefore no EMC considerations.
Similarly the receivers detect the amplitude of the received signal, and will only exit electrical idle if the received signal is sufficiently large. With their built-in termination, leaving the lines floating will not cause any issues as the received signal will be fixed to a constant voltage by the internal termination.
For the Refclk signal, PCIe uses a HCSL clock design whereby the termination is on the main board. Termination on the add-in card is not required, but is allowed.
For the WAKE# signal, the pin should be left unconnected per the Mini Card Electromechanical Specificaiton:
For the CLKREQ, the same is true: