First: let's assume that the truth table values are calculated for the rising edge of the clock. This is sequential logic, and the truth tables requires informations about the previous state; in this case, Z represents Q(i-1).
There are some mistakes in the truth table, but the truth table of the full adder is this:
$$
X+Y+Z=1 \rightarrow Q=0, S=1
$$
$$
X+Y+Z=2 \rightarrow Q=1, S=0
$$
$$
X+Y+Z=3 \rightarrow Q=1, S=1
$$
The flip-flop is used to keep the old carry output until the clock is raised (and to avoid the loop due to the feedback to the carry input), and it doesn't change the truth table as long as you consider the values after the edge.
So, this should be a (clocked) serial adder, because inputing two sequences of bits (starting from the less weighted) after resetting Q, you have at the output S the equivalent bit of their binary sum.
IMPORTANT: You should latch the sum bit because otherwise when you have the rising edge, the sum will be updated with the new value of the carry, so will be valid only until the carry signal is passed through the adder.
In this case, in which the sum bit is not latched, it will assume a value that takes into account the carry of the new operation, and it won't be correct; so the truth table will be like this:
Z Y X | Q S
----------------
0 0 0 | 0 0
0 0 1 | 0 1
0 1 0 | 0 1
0 1 1 | 1 1 !
1 0 0 | 0 1
1 0 1 | 1 0
1 1 0 | 1 0
1 1 1 | 1 1
! := It's not the value that an adder would give, because with the clock raising edge, the carry out is brought to Q and sums with X and Y giving again the sum and carry high.
It can help to add intermediate states to the truth table; there are a lot of letters from the alphabet you haven't used :-). Name the output of the first XOR gate D and add a D column to the truth table. You may want to have clearly separated "inputs", "intermediate" and "outputs". I separate them with a vertical line, and fill out the combinations for the inputs. You have three of those, that's eight combinations.
Then fill out column D, which takes A and B as inputs. Even if there were 15 more inputs, ignore them; only A and B are relevant. Work gate per gate, divide and conquer. When you've finished column D you can fill out column S in the "outputs" section, because that only depends on D and Cin, and you have those.
Repeat for the outputs of the AND gates: add E and F to the "intermediates" section, and fill them out only looking at the columns which are input for each gate.
is correct? Thank you very much.
Best Answer
Yes. The answer will be true or false. But exactly for what combination of inputs ? The equation gives you this answer. It will be true ( = 1 )for a given combination of inputs and false ( = 0 ) for the rest. To test this, plug in random values of input, and solve the equation. The answer you get must match with that provided in the truth table for the same set of inputs. So in essence, you have "Reduced" that big table to a single equation and can use it to find the result rather than have to look the table again and again.
As far as drawing a circuit from sum of product form is concerned, you proceed as follows :
1) Get the simplified equation (You already have it I guess).
2) For all terms appearing as product ( like AB , which has the inputs A and B ANDed), use an AND gate for each such input.
3) Connect all the outputs of AND gates to inputs of an OR gate. In your case, you have AB, BD, ACD OR'd ( + means OR operation). So connect the outputs of AND gate from step 2 to an OR gate.