As you know, you use the upper part of the structure (from Vout to Vcc) to set the 1's and the lower part of the structure (from Vout to Vss) to set the 0's.
You can do this directly from the function expression. For example, let say your function is F=A·B*+C. I've chosen a different (and shorter function) for a simpler illustration of the method.
The upper part is easy (A and B* in series for AND) and C in parallel (for the OR part). The variables enter negated into the PMOS gate, because the PMOS will turn ON for 0 V (and not 5 V).
simulate this circuit – Schematic created using CircuitLab
Then the lower part must implement the 0's. Recalling the De Morgan Theorem, by negating F, AND becomes OR and viceversa. Applying to our function: we'll get F*=(A*+B)·C*
Therefore, in the lower part we have A* and B that are in parallel while C is in series. The variables doesn't enter negated into the NMOS gates because NMOS turn ON for 5V.
This method can be applied also to your original function, it just needs much more space!
First of all, these are the steps you should follow in order to solve for SOP:
- Write AND terms for each input combination which produce HIGH output.
- Write the input variable if it is 1, and write the complement if the variable value is 0.
- OR the AND terms to obtain the output function. In other words, add the AND terms together to produce your wanted output function.
- SOP will have this form from the truth table given in the question: $$F = \overline{A}BC + A\overline{B}C + AB\overline{C} + ABC$$
The first term:
$$\overline{A}BC$$
A is equal to 0 in the truth table when output F is equal to 1.
The second term:
$$A\overline{B}C$$
B is equal to 0 in the truth table when output F is equal to 1.
The third term: $$AB\overline{C}$$
C is equal to 0 in the truth table when output F is equal to 1.
The fourth term: $$ABC$$
A, B, C are all equal to 1 in the truth table when output F is equal to 1.
Secondly, these are the steps you should follow in order to solve for POS:
- Write OR terms when the output F is equal to 0.
- Write the input variable (A, B, C) if the value is zero, and write the complement if the input is 1.
- AND the OR terms to obtain the output function. In other words, multiple the OR terms together to get the final output logic equation.
- POS will have this form from the truth table given in the question:
$$F=(A+B+C)(A+B+\overline{C})(A+\overline{B}+C)(\overline{A} + B + C)$$
The first term:
$$(A+B+C)$$
A, B, and C are equal to zero and the output F is equal to zero as well.
The second term:
$$(A+B+\overline{C})$$
Output F is equal to zero but C is equal to 1. Hence why we take complement.
The third term:
$$(A+\overline{B}+C)$$
Output F is equal to zero but B is equal to 1. Hence why we take complement.
The fourth term:
$$(\overline{A}+B+C)$$
Output F is equal to zero but A is equal to 1. Hence why we take complement.
Essentially, you have to follow the three first steps in order to successfully for SOP and POS. You could have a lot more terms depending on your output results or the number of inputs you have.
Note that the results shown above are not in the reduced format. You could potentially reduce those Boolean-logic equations much more.
Best Answer
The column for f is definitely wrong. (Look where it is connected. It can only have one value, ever.)
Columns a d e g are also wrong. They should always all have the same value (correct) and it should be the inverse of L.
Column b is wrong. It is the AND result of inverse L and inverse B. Your column b has all values the same, which can't be correct.
Column c is incorrect as well. It is the result of inverse B OR L.
You are missing a column for the BELL signal.