digital-logicledttl
This is a TTL logic level checker circuit , highlighted blue area is a checker pin. Voltage at checker pin is 0.65V so this must be logic 0 , LOW LED will on.
But in input of first 7404 NOT gate in first row is 1.3V and 2nd 7404output is LOW , logic 0.
Why first NOT gate in first row thinks 1.3V is a logic 0 , (LOW)
isn't TTL voltage range in 0.8-2V is a unvilad area ?
Assuming that the inverters are CMOS ones, the circuit is equivalent to:
simulate this circuit – Schematic created using CircuitLab
While in the schematics you provided it seems like the circuits are interrelated, in fact they are not. Two completely separate blocks having a common input.
The basic idea behind this circuit is this:
M2 and M3 are functioning as pass-transistors in this case.
The function of M2 and M4 are less important - they pull the voltages down/up when the LEDs are not required to be ON. I believe that the circuit would function without them as well. However, the presence of the full inverter allows for a very steep ON/OFF characteristic for LEDs - there is no wide transition region between ON/OFF states.
Crosstalk such as this can be caused by many things. Among them:
Moreover, your scope probe is susceptible to these things also. Depending on exactly how you attach the probe, what kind of probe, what kind of scope, where the cable is lying, etc, you change the circuit, and thus its behavior.
In particular, when the scope's ground connection is far away from the tip, this adds a lot of inductance to the probe. Here's a very common solution: What is the name of this springy type oscilloscope probe accessory?
The solution to this sort of problem (if there is indeed a problem, and not a flaw in your measurement technique) is a combination of careful layout to reduce unintended capacitive and inductive coupling and provide clean power rails, and making components tolerant of the noise that remains.
Best Answer
I assume since your circuit says it is using 7404, and not for example 74LS04 etc then it is really classic 7404 TTL.
So you are right, according to the datasheet the range for a low input is 0v to 0.8v, and a high from 2v to Vcc or 5v.
So, any input up to 0.8v is guaranteed to be a 0, and any input 2v and above is guaranteed to be a 1.
As you point out, the region in-between is a no-man's land. But that doesn't mean there is no output, it's just undefined. The input could be considered a 0 just as well as 1. But it has to be one or the other.
In your case, the gate considers the input of 1.3v to be a 0. This is not unexpected; the midway point between 0v and 2v is 1.4v, and this is slightly below that. Since this is a simulation, it is probably programmed to act that way. But in real-life, even if the input was 1.9v, it could still be considered a 0, just unlikely.
BTW your two voltmeters are not connected the same way, your top one (1.323v) shows the voltage going into the top 7404, but your bottom voltmeter (0.652v) shows the voltage at the junction of the two diodes, so the voltage is a diode drop above the voltage going into the input to the bottom 7404.