From the text, this appears to be a USB high speed interface.
The signal pair will have very little current, but you need to keep losses to a minimum.
The losses in high speed tracks are dominated by:
Skin Effect. This is because as signal transition rates become faster, the self-inductance of the conductor forms a high impedance in the centre of the conductor. A wider track reduces this loss (but it has diminishing returns above about 8 thou).
Dielectric absorption also causes losses. There is an excellent description of them here.
Another cause of losses is differential to common mode conversion, usually caused by a length mismatch between the pair.
The practical implementation of a controlled impedance pair depends whether you have a plane layer which is immediately below the signals; I will assume for now that you do and it is spaced 5 thou away from the signals (implies a 4 layer or higher PCB). The actual distance is determined by the various requirements of the PCB; a 5 thou core is commonly used (although many thicknesses exist).
I usually use 6 thou tracks for USB high speed (a decent trade-off for skin effect and PCB real estate); the gap between the pair can now be calculated by any number of tools.
For the geometry above, my calculations yield a trace separation of 4 thou using 1 ounce copper (commonly the finished thickness on outer layers).
If you do not have a plane layer, there are other techniques such as differential coplanar waveguide; just what technique I use is determined by the PCB geometries.
There is no one size fits all, but using a 5 thou to 6 thou track width as a starting point helps narrow things down.
1) Three layer boards are incredibly uncommon and difficult to manufacture, and will cost you a lot more. Make a four-layer board instead. That being said, asymmetrical ground plane distances is not a problem, but will affect impedance. Use the Saturn PCB Toolkit to get your required trace widths and dielectric thicknesses. That tool has an asymmetric edge coupled microstrip impedance calculator built in.
2) The exact distance between the two conductors in a pair isn't as critical as you might think, provided they are well away from other conductors and polygons that are not part of the differential pair. Design to make sure the tracks are as close together as possible and meet impedance requirements.
3) Trace lengths between separate LVDS pairs are most important when your receivers are very time-dependent (i.e. you need to make sure all of your data reaches the receiver before the clock triggers. Otherwise you could lose data). Actual length requirements depend greatly on the transmitters and receivers you're using, as well as the frequency of the transmitted signals. When it comes to the conductors within a single pair it becomes much more critical. How critical depends, once again, on the frequency of the transmitted signals and how good your receivers are at detecting transitions.
4) Without providing us with your design it is impossible for us to critique it.
5) Right The First Time by Lee Ritchey is one of the best books I have ever found for designing for high-speed signals. It has a LOT of in-depth descriptions, explanations, tips, tricks, etc that are immensely useful. I cannot recommend this book enough.
While I have done some high-speed design I am by no means an expert, so I am open to corrections and additions to this post.
Marcus is right, though, each one of these questions could be given its own post and you'll get more in-depth answers that way.
Best Answer
I've added a label (
EG
) to what I think you are asking about, which would effectively be the "external gap" between differential pairs:The short answer is: make the external gap 5 times as wide as the trace width of one of the traces in the differential pair. (In other words, 5 times Wn.)
(The difference between W1 and W2 is based on etch factor. Consult your PCB fabricator to get more specifics. If they're different, use W1.)
For more information, there is another Altium article by Zachariah Peterson titled "Differential Crosstalk and Spacing Between Differential Pairs" you may be interested in.