I am refering to the document SLMA002G PowerPAD™ Thermally Enhanced Package from TI. Kindly refer to page 9(screen shot attached).
this is related to thermal vias present on the ther or open pad which solders to the open pad of an IC.
The statement in question is state below –
The experiments conducted jointly with Solectron Texas indicate that a via drill diameter of
0.33 mm (13 mils) or smaller works well when 1 ounce copper is plated at the surface of the board and simultaneously plating the barrel of the via.
This means that if the layer is of 1 Oz then a drill dia of 13mils for via is enough for decent thermal dissipation,right ?
What if the Cu is 0.5Oz how much would the drill dia need be changed ?
Best Answer
The larger the "thermally active" cross section of your via's plating is, the lower its thermal resistance will be. The plating's cross section is, with \$d\$ being the diameter and \$t\$ the plating thickness:
$$A \approx \pi d t$$
That means larger drill -> larger area; and thicker plating -> larger area. OTOH, some solder will get into the via hole and enhance heat transfer between the two board sides, but that's harder to quantify because the via is not necessarily filled with solder.
Given that the overall available area for thermal vias is usually fixed, I'd use a larger number of smaller vias in order to fill a larger fraction of that area. 0.3 mm sounds reasonable.
Can you show us numbers of other via diameters, or did they just make a statement about 0.33 mm?
A thermal simulation would show more detailed insight, but that's probably a bit over the top.