The layout you showed looks like what's called copper-backed coplanar waveguide (CBCPW). That means the ground return for the waveguide is not just in the coplanar grounds (the ground fills on the same layer as the signal traces) but also in the plane layer immediately "below" the signal layer. This structure is fairly esoteric, in the sense that I've only seen it used in digital systems when data rates exceed 20 Gb/s.
I found what looks like a reasonable discussion on the differences between CBCPW and microstrip in a Microwave Journal article by Rogers Corp engineers.
This article shows that the CBCPW has lower loss than microstrip at frequencies where radiation loss becomes important in the microstrip, roughly from 25 GHz and up, which explains why CBCPW is not widely used at lower frequencies.
Addressing your question, the article points out some special requirements for grounding vias in CBCPW structures:
For proper grounding, CBCPW circuits employ vias to connect the top-layer coplanar ground planes and the bottom-layer ground plane. The placement of these vias can be critical for achieving the desired impedance and loss characteristics, as well as for suppressing parasitic wave modes.
This basically means that without frequent stitching vias between the coplanar ground and the backing ground, power could be transferred to undesired propagation modes, which would cause either excess insertion loss or strong dispersion in the transmission line characteristics.
What's the problem?
It isn't clear why you can't use your existing layout and just translate for the bigger package?
Guard rings are about DC...
The guard ring is designed to deal with leakage currents by placing a nearby intermediate voltage between sensitive sources.
The ground plane is for providing the low-inductance return path. If you are moving (returning) a substantial percentage of your signal on the guard ring, something is wrong.
Terminating your guard ring is not a hugely complicated concern, so don't over-think it.
Bypass what exactly?
The load capacitors/oscillator do not need an additional bypass. It doesn't do anything because there is nothing to bypass here.
The power loop for the oscillator includes the power entry pin to the PIC (bypass there), it's internal power distribution grid, the oscillator driver circuits, the oscillator tracks, and the crystal/osc itself.
Your bypass cap at the bottom of the second figure doesn't influence anything in that pathway. The answer you cite deals with a completely different scenario (the power pins of the IC itself, not I/O pins as in your scenario).
What to do:
- Single via at the extremity of the guard ring to ground plane
- Keep the crystal/osc lines as short as possible
- Place the load caps next to the crystal/osc -- turning them so that they are parallel to the long side of the crystal/osc with their ground pins facing each other is a good way to lower inductance, but it isn't critical to do so.
- Pour a small surface ground plane over the ground pads (don't forget thermal relief) and stich to the ground plane underneath with a few vias.
- Escape the nearby PIC pins via fanout and via to the lower surface for further travel (allows the lines to take up less y-space so that the crystal can be placed closer to the chip)
- Regarding C10 in the original figure. Just place it as close to (what looks like to me) pin #38 as possible. Don't worry about a cap near pin #41. It's covered by C10 even if C10 is a little further away.
Good luck! I'll follow-up if you have any further questions. Cheers.
Best Answer
The short answer is that neither matter in most cases. The only good reason I have for doing such a "fence trace" is to prepare for maybe adding a shielding can later (after testing if it works okay without). The trace in itself does not help much - other than adding some distance (which you could do without the trace).
The longer answer requires you to first explain what you are trying to achieve, why you think this will work and how you think it will work.
In general: If you don't understand what you are doing - maybe don't do it :-) A lot of time is spent copying stuff we "think" is good and often creating more problems than we had in the first place.