Background: I am familiar with interfacing a few incremental/quadrature encoders to a single MCU chip. My go-to chip STM32F10x can decode 4-5 encoders even in a LQFP64 package (e.g. STM32F100R8T6 has 4), which had always been more than enough for me… until now.
Problem: I want an ATXMEGA128 to effectively poll counts of all 30 encoders at 1kHz (say, by keeping 16-bit counters). I cannot change the ATXMEGA128 to some other MCU, but I can add another MCU to interface with it.
The bottom line is I could slap on a FPGA (e.g. Spartan3E) and make it talk to MCU through SPI or parallel, but I'd like to consider some alternatives before I go down this path (for non-technical reasons). The number can be reduced to 15 if 30 seems too hard without FPGA.
Best Answer
A small FPGA is the way to go here. You would need a very large CPLD to manage this many encoders - they are not useful for much more than glue logic. Generally a CPLD gives you one flip-flop per pin. An FPGA has logic resources that are specifically designed for building things like accumulators and shift registers, and far more of them than a CPLD with the same number of pins. For 30 encoders with 16 bit counters on each, that's a minimum of 480 flip flops just for the counters, not counting the encoder processing and SPI interface. I would suggest a small Spartan 3 or Spartan 6 - they are available in TQFP and should be easy to interface with.