What does schematic of a transceiver equalizer and transceiver preemphasis circuit look like

Well, if you're going to have PSoC5's all around, I was recently reading about IEEE 1355. The DS-SE-02 signal link variant may do what you want. It calls for 4 signal lines: a data line and a strobe line in each direction. The only dedicated hardware I can find that implements 1355 is rad-hardened Spacewire gear, but this IEEE presentation claims that it can be implemented on an FPGA with 1/3 of the gates of a UART and operating at speeds 100 times faster than a UART.

A public copy of the full standard is available courtesy of CERN if you're up for a bit of light reading. I haven't had a chance to sit down with the full thing, so I can't speak for its EMI performance. Looking over the DS-SE section, it looks like you have to control for impedance in the transmission line and terminate at the receiving end.

The terminology is vague at best. There are no hard and fast rules, and nobody playing police when people don't use the term correctly.

Usually, but not always, a transceiver is a simple buffer that has different signal standards on the inputs and outputs. For example, an RS-232 transceiver usually interfaces TTL signals to RS-232 signals. Also, transceivers are similar to "drivers" and "receivers" except that a transceiver usually does both driver and receiver functions in the same chip.

A Phy is similar to a transceiver in that there is usually different signal standards on "both sides of the chip". With Ethernet it is MII/GMII/etc on one side and, well, Ethernet on the other. There are other Phy's that talk USB, PCIe, and many others. Phys usually incorporate some sort of SERDES (SERializer-DESerializer) function and line encoding. More sophisticated PHYs contain a mini-DSP in them to do all sorts of crazy communication things like advanced baseband wander correction.

A transceiver does not have to be associated with a serial data-- they can be used for parallel data as well. A PHY usually involves some sort of serial data stream. But this is more of a convention than a rule, and I am sure there are chips out there that are exceptions to this.