Why are the pins RC3 (SCL) and RC4 (SDA) configured as inputs during I2C initialization in PIC18F

i2cpic

I am on the process of interfacing a RTC DS1307 with PIC18F. So, the controller will be the master and I2C the slave, therefore the controller will generate clock and data as outputs, If i am right?. However, I went through a couple of codes and noticed that the RC3 and RC4 pins are configured as inputs during the I2C initialization. My question is, Aren't these pins supposed to be configured as outputs in order to clock out and data out (as it is in Master Mode) to the RTC?.

Below is an example from one of those codes:

void i2c_init()
{
 TRISC3 = 1;
 TRISC4 = 1;
 SSPSTAT |= 0x80; //Slew Rate Disabled
 SSPADD = 49;

 SSPCON=0b00101000; //Master mode
 SSPADD = 49;

 /*SSPEN = 1
 Enables the Serial Port and configures the SDA and SCL
 Pins as the Serial Pins
 SSPM3:SSPM0 --> 1000
 I2C Master Mode
 Clock = Fosc/4*(SSPADD+1)
 */

}

Can someone please explain why are they configuring these pins as inputs ?

Thank you all in advance!

Regards

~VD

Best Answer

It is because the PIC I2C bus is a multi master module, so it needs to detect the bus is free before sending data to it. The requirement to configure the pins as inputs are in the datasheet (I'm using 18F4550 as a reference):

The MSSP module in I2C mode fully implements all master and slave functions (including general call support) and provides interrupts on Start and Stop bits in hardware to determine a free bus (multi-master function). [...] The user must configure these pins as inputs by setting the associated TRIS bits.

(http://ww1.microchip.com/downloads/en/DeviceDoc/39632e.pdf - Page 209)

EDIT: I just realized you specified master mode. In this case, refer to page 228 of the same datasheet:

In Master mode, the SCL and SDA lines are manipulated by the MSSP hardware if the TRIS bits are set.

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