Why the output voltage of dsPIC IO ports is not constant

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I expect output voltage of dsPIC pin should be 3.3V, and this seems to be true when the output pin is connected to high resistance.

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However, when I connect to low resistance, the voltage of output pin is pulled low.(The image below shows the voltage is 2.75V).

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I suspect it is caused by the circuit in the microchip, but I don't know how to analyze it.

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BTW, here's the datasheet of this chip.

Best Answer

The output pins of a micro can only supply so much current. If you try to draw more current then they can provide, the voltage will drop (as you are experiencing).

Here is the documentation for the microprocessor you are using:
enter image description here Datasheet page 231, Section 24.0 - "Absolute Maximum Ratings"

As you can see, the datasheet only rates the IO lines to supply an absolute maximum of 4 mA each (and you should derate the them as well. Use 2-3 mA as a safe limit). As such, you're actually exceeding the MCUs rated current by an order of magnitude! (\$\frac{V}{R}=I, \frac{3.3V}{100Ω}=33 mA\$). I don't know how the simulator you are using handles this sort of abuse, but with the real micro, you could very well damage the output buffer of the IC.

To some extent, you can think of the output of each IO pin as being a perfect output driver in series with a resistor (really, it's more complicated - there is also inductance, capacitance, and some fun non-linearities, but we'll ignore those for now). As such, even if you are not exceeding the absolute maximum ratings, there will be some voltage sag as you load the IO pin.

From the datasheet referring to the (1) next to the "Absolute Maximum Ratings" line:

Note 1: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

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