I want to understand how Cisco's CEF and Fast Forward cache packet switching is better than process switching, and I think I might be having trouble understanding Cisco's language.
When they say that a FIB (Forwarding Information Base) or Fast Forward Cache stores the next-hop information and this helps in cutting down time in routing packets, I wonder how slow process switching is in comparison? Is looking up encapsulation method and the exit interface a real burden on the CPU?
All three packet forwarding mechanisms are using time (CPU cycles?) to de-encapsulate the packet and learn its destination address. Up to this point I think they are using the same time. Then a comparison is made to either the FF cache or the FIB or the routing table (process switching) for the exit interface and encapsulation method. The time difference must exist at this stage.
I don't get what the difference is whether you look up the next-hop info from either a cache or RAM? Matter of efficiency? Can someone help me understand?
Best Answer
It is more about "all the other things" that need to be looked up.
A Routing table will tell you the Next-Hop IP (and therefore, the exit interface).
But then the Router will have to look at the ARP table to see what the L2 encapsulation will have.
Then the Router will have to look at the Interface MTU, to ensure the packet doesn't need to be fragmented.
Then the Router will need to look at type of media to Encapsulate the packet properly (is it Ethernet2? Is it HDLC? Is it PPP?, etc).
There are a slew of others. (and I'm sure other posters to this SE will fill in the details).
But consider each "lookup" may take the same approximate time, and if so fewer lookups will always be faster than more lookups. CEF, and the like, are merely combining all the tables into one so that only one lookup is required.