Ethernet – the use of Phy and MAC chip

ethernetmacnetwork-core

Is it mandatory to have a MAC and PHY chip?
Are these two chips within a NIC CARD?
As I understand, these two chips are connected using RGMII or SGMII or xaui.

Best Answer

The Ethernet standards (at least for 100 megabit and gigabit, i'm not 100% sure about other speeds) are logically defined in terms of a MAC and PHY connected via a standardized medium independent interface.

The MAC handles the transition between frames in a buffer and line rate streams of data. On legacy half-duplex networks it also handles medium access control. On the receive side it performs basic filtering of incoming packets.

The PHY handles stuff that is specific to the physical medium, encoding the data stream into the correct form for the particular physical medium and driving/receiving it from the lines at the correct voltage level.

However just because the standard splits things up in a particular way that does not mean they are required to be implemented that way. There are a number of variants of the medium independent interfaces for each speed trading off bus width and clock speed and when a MAC and PHY are integrated on the same chip the standardized medium independent interface may be eliminated altogether.

In practice a typical 100M or 1G copper network card (i'm not sure what the exact situation is with faster cards and fiber cards) will typically have the MAC, PHY and PCI or PCIe interface integrated onto a single chip. Many higher end controllers will also integrate additional functionality to offload work from the host's network stack. Similarly for USB network adapters the MAC, PHY and USB interface will be integrated on a single chip.

On the other hand the embedded world often uses an arrangement where the MAC is integrated as part of the main "system on chip", then connected to a separate PHY over some variant of MII.

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