CPU Architecture – Floating-Point Math Optimization

cpumathoptimization

I'm trying to wrap my head around some details about how floating point math is performed on the CPU, trying to better understand what data types to use etc.

I think I have a fairly good understanding of how integer math is performed. If I've understood correctly, and disregarding SIMD, a 32-bit CPU will generally perform integer math at at least 32-bit precision etc.

Is it correct that floating-point math is dependent on the presence of a FPU? And that the FPU on the x86 is 80-bit, so floating point math is performed at this precision unless using SIMD? What about ARM?

Best Answer

Many times, operations like floating point and memory management are encoded in a way that they can be "trapped". This means that the system can be configured to either use hardware or automatically branch to a software implementation. In the case of software, the implementation can be anything, although most manufacturers supply libraries that follow accepted standards (IEEE-754 in the case of floating point). In many systems, when a floating-point unit or other chip is installed, the instruction execution is automatically deferred to the new chip, so no software reconfiguration is necessary.

As I understand it, the ARM architecture does something very similar to the x86, with floating-point instructions that trap to software emulation if no FPU hardware is found.

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