I want to design a little oscilloscope that is able to analyze signals up to 1 MHz using a Xilinx FPGA. I want use the VGA interface in order to display the signals. Is it possible obtain a good result using only FPGA and an external RAM for signal elaboration? Or is it necessary to use an external microprocessor? With the Xilinx ISE Webpack license I can't use the MicroBlaze softcore processor, but only the PicoBlaze. What is the better way to obtain a good result with a simple and cheap design?
Design a FPGA based Oscilloscope
fpgaoscilloscope
Related Solutions
The Xilinx tools can't interface in real-time as far as I know, neither can ModelSim (used by Actel's Libero IDE)
I don't know about open source simulators, there are some rather exotic projects out there so it's possible there is something that could do this.
However, this may be you an answer you didn't ask for (I'll delete it if it's not helpful), but I would consider building your own FPGA board to do this or at least get started along the way towards it. I etched my first FPGA board and though it was very simple (the board not the process ;-) ), it taught me an awful lot quite quickly.
Pros:
- Cheap
- Jump right in at the deep end and learn all you need to know about the hardware considerations. Forces you to read most of the datasheets first, and write your own starter code, which IMHO is often better than the plug and play dev board approach to learning.
- Only put on the board what you need to.
- Get's you further towards your goal of a real working design with possibly the same effort/research as the figuring out how to simulate it all in real-time would.
Cons:
- Still need to buy a programmer, although cheap versions of the Xilinx/Altera programmers can be found on eBay.
- If PCB/signal integrity design and issues are not something you wish to focus on, then you may not be interested in much of the knowledge to be gained by doing it this way.
I understand the etching your own board is probably unnecessary, I only did it because I had the FPGAs there, was impatient and didn't want to wait 2 weeks for a PCB to arrive. There are extremely cheap deals out here for 2-layer boards, which would do to at least run your design (possibly at lower speeds than eventually desired - normally the minimum layer count for a high-speed FPGA design would be 4, but these are much more expensive)
Anyway, Spirit Circuits does a completely free 2-layer "bare bones" PCB deal (one a month, one design, no mask or silkscreen) which comes in handy for a one off design.
Also, for proper 2 and 4 layer cheap prototype boards, ITead and Seed Studio go as low as $10 for 10 boards (or possibly 5 at that price) services.
Xilinx uses (user constraints file) UCF to bridge the physical pin connections to TOP signals. This file is added to a Xilinx project
the format looks like:
NET "CLK_40Mhz" TNM_NET = CLK_40Mhz;
TIMESPEC TS_CLK_40Mhz = PERIOD "CLK_40Mhz" 25 ns;
########################################################
#8+2 LED's for indication
########################################################
NET "FPGA_LED<0>" LOC = B21 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<1>" LOC = B22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<2>" LOC = C21 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<3>" LOC = C22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<4>" LOC = D21 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<5>" LOC = D22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<6>" LOC = E22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<7>" LOC = F21 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<8>" LOC = F22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_LED<9>" LOC = G22 | IOSTANDARD = "LVCMOS33";
#######################################################
#6 FET/IGBT gate-drive FET-outputs
#######################################################
NET "FPGA_Gate1" LOC = V22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_Gate2" LOC = W22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_Gate3" LOC = W21 | IOSTANDARD = "LVCMOS33";
NET "FPGA_Gate4" LOC = Y22 | IOSTANDARD = "LVCMOS33";
NET "FPGA_Gate5" LOC = Y21 | IOSTANDARD = "LVCMOS33";
NET "FPGA_Gate6" LOC = AA22 | IOSTANDARD = "LVCMOS33";
NET "CLK_40Mhz" TNM_NET = CLK_40Mhz;
TIMESPEC TS_CLK_40Mhz = PERIOD "CLK_40Mhz" 25 ns;
This is a snapshot from one of my UCF's
Best Answer
1 MHz is slow enough that this should be doable without a FPGA. Perhaps you may want to use a external A/D or sample memory, but orchestrating all that should be possible with just a decently fast microcontroller.
Some of the dsPIC 33F have built-in A/Ds that can sample at 1 MHz, if I remember right. You don't typically need lots of bits for a oscilloscope, since the user will adjust the gain and offset to zoom in on what they want to see. Entry level scopes don't have more than 256 pixels vertically anyway, so obviously aren't showing more than 8 bit of information per sample. The 10 bits the internal A/D of a dsPIC can do should be sufficient.