$s
and $t
are register specifiers. Your interpretation MEM[RegisterData(s) + offset]
is basically correct. $s
means, essentially, "get the data out of register number s
in the register file." So if s
in the instruction is the bit pattern 10001
, then $s
means: read the value out of register 17, add the sign-extended offset bits (the 16 bits represented by i
in the encoding), and use that as the address to access the memory. Similarly for the $t
in the lw
instruction. It means write the data back into the register numbered t
.
Your question about sign extension: look up two's complement. The 16 bit two's complement number 0000 1111 1111 1111 is decimal +4095. The 16 bit two's complement number 1000 1111 1111 1111 is decimal -28673. The 32 bit two's complement number 0xffff8fff is also -28673. The 32 bit two's complement number 0x80008fff is decimal -2147446785, which is clearly not what you want.
- LW loads a word from memory into a register.
- SW saves a word from a register into RAM.
To copy from one register to another you would typically perform an operation which resulted in the data of one register being copied intact into the other register, such as:
or $s2, $zero, $t1
That has the effect of ORing the value in $t1 with the value in $zero (which is always zero), the result of which is $t1 unmodified, which is then placed in $s2.
MIPS can be confusing as there is no instruction specifically for copying from one register to another, but then that's the essence of RISC - why have a MOVE instruction when you can perform the same operation with an OR? It just wastes instructions.
Most assemblers have a collection of macros to make your life easier. You may well find that yours has support for a virtual MOVE instruction, as well as others. Some expand to just one instruction, but some expand to more than one, such as "li", which usually expands to something along the lines of:
lui $t1, %HI(val)
ori $t1, $t1, %LO(val)
I.e., load the upper 16 bits into $t1, then OR the lower 16 bits over the top of it.
Best Answer
I had these pictures sitting around except for the red lines.
The two instructions differ in semantics:
$t is the destination register, $i is an immediate value.
LUI:
LW:
The images are all links to their full size versions.
In a real implementation the muxes to the ALU could likely produce 0 and 1 constants.
And along the bottom of those pipeline diagrams the
$t
should actually bet
, the pointer to the target or destination register.