Digital Clock Circuit With A Buzzer

555digital-logicverilog

I developed a digital clock circuit that simply resembles the function of a stopwatch. The circuit works fine, but I decided to add an extra functionality: A buzz is produced each hour, but I seem to have a problem understanding the usage of IC 555 terminals. So please review the buzzing part of the circuit and explain what should I append to the IC 555 terminals.

Here's an image to the circuit diagram with the buzzing function…

![enter image description here][1]

[1]:

Thanks in advance 🙂

Best Answer

See http://www.ti.com/lit/ds/symlink/ne555.pdf, page 9. This will provide a beep on the hour, with a duration set per the data sheet.

Also, you need to make a debounce circuit for your "advance minutes" switch.

Your reset circuit for the hours will not work as you think it will. As soon as the clock hits 23 hours it will reset. I suggest detecting 24 hours and using that to reset your 10 hour counter. The delay through the and gate and the or gate will provide enough delay to reliably reset the counter.

Tie all of your unused inputs high or low - don't let them float. You don't indicate what process chips you're using. If CMOS (74HC), tie the inputs directly to ground or power. If 7400 or 74LS, use a 1K pullup resistor to tie high, ground for low.