Electronic – LED Quiz Buzzer Circuit With Logic Gates

It looks like your latches woke up in the unknown 'X' state, and the complement of X is another X. For your simulation to work you need a way to initialize the latches in a valid logic state, either 0 or 1. Sorry, but I'm not sure how to do this in Logisim other than adding a separate reset input to your circuit. Perhaps you can specify an initial state in the properties for each gate.

Of course, in real life the latch will wake up in either a 0 or a 1 state and the toggle will work as expected. This is a common artifact of digital logic simulations...unknown values propagate pessimisticly...and you soon learn that it's best to have an explicit reset for the storage elements.

Absolutely. If you're doing high performance, full custom chip design, anything to get an edge will be done, including transistor level design of critical blocks. However, even at a standard cell library level, things like adders are implemented using more complex blocks than simple AND and OR gates. A full adder can be built out of a more specialized collection of transistors than what would directly correspond to the equivalent logic gates. A standard cell library will include several variations of full and half adder cells alongside the more basic AND, OR, NOT, XOR, etc. gates, as well as some common combinations such as and-or-invert (AOI) and similar that are relatively common and can be built more efficiently at a transistor level. Same goes for latches and flip flops. You won't use a pair of cross connected gates for a latch, you would use a specially designed latch cell.