Electrical – Cadence gain and phase margin

cadencestability

I am trying to figure out the stability of an amplifier, for which I have to calculate the loop gain and make sure its not negative for instability.
In Cadence one can use 'stb' analysis to calculate loop gain. The loop gain and phase looks as follows
enter image description here

The circuit:

enter image description here

With respect to the phase of the loop gain starting at -180 degrees, this has to do with a sign convention adopted by cadence. Please check these links if you are more interested https://sites.google.com/site/frankwiedmann/loopgain
https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/30938/stb-analysis-phase-margin-gain-margin-functions/1338980#1338980

In this case the 0 dB gain is at roughly 9.2 MHz and the phase margin is negative 5 degrees, indicating unstable behavior. But if I try to calculate phase margin from direct plot form, I do not get a value of phase margin as shown below:

enter image description here

Can anyone throw light on this problem?

Best Answer

The STB main form in Virtuoso will produce eval errors for any negative or gain phase margin, the same is true if you use the PhaseMargin function in the calculator. In cases such as these, doing it manually is sometimes the easiest way to see what is going on. Don't forget that ideally you want a phase margin of ~60, and general rule of thumb is > 45 to ensure stability.