Electronic – Phase margin analysis of a [diy] PMOS LDO [with LTspice]

I would go with Hypothesis 2.

I think, you have simulated the loop gain correctly. The input impedance at the inv. input seems to be much larger than the combined source impedance of the remaining network. I recommend to make another test and select another point for placing the test signal source: Between the opamp output and the common node of C2 and Riso. The result should be (nearly) the same as in your first simulation.

However, I tend to Hypothesis 2 because the known relation between overshoot and phase margin applies to second-order systems only. However, your system is of higher order (opamp 2nd order, FET 1st or 2nd order, two external capacitors). More than that, the simulation results clearly show an enhancement of the phase caused by C1 (improving stability). The mentioned relation between time and frequency domain does not allow such a zero.

UPDATE: I think, the form of the step response confirms my analysis: It does not show a typical "overshoot" (which should exhibit some ringing for such a large peaking). Instead, it shows the typical form for a step response of a highpass (caused by the capacitor C1)

Gain and phase margin are usually applied to systems that are amplifiers of some sort with negative feedback around them. The more negative feedback, the tighter the system is controlled. However, you don't want to provide feedback in such a way that the system will oscillate. The gain and phase margin are two metrics to tell you how close the system is to oscillation (instability).

A system with over-unity gain will oscillate with positive feedback. Usually the intent is to stabilize a system by using negative feedback. However, if this is phase shifted by 180°, then it becomes positive feedback, and the system will oscillate. This can happen due to various characteristics of the system itself or what happens to the feedback signal.

Note the two criteria for oscillation: a gain greater than 1, and positive feedback. Since we are usually trying to provide negative feedback, we think of positive feedback as what happens when there is a 180° phase shift in the loop. This therefore gives us two metrics to decide how close to oscillation the system is. These are the phase shift at unity gain, and the gain at 180° phase shift. The first had better be below 180°, and the second had better be below 1. The extent they are less than 180° and less than 1 is how much room, or margin, there is. 180° minus the actual phase shift at unity gain is the phase margin, and 1 divided by the gain at 180° phase shift is the gain margin.

Since the main problem is usually that the overall phase and gain change as a function of frequency, loop gain and phase shift are often plotted as a function of Log(frequency). The gain curve is then basically a Bode plot. You have to examine the two curves carefully to see that the system stays away from the combination of characteristics that will make it oscillate. When this is the main point, something called a stability diagram shows you more directly how close the system is to instability and at what operating point. That closest approach to instability is called the stability margin.