I study one course about VLSI. in adder lecture my profesor talk about Adders. in Carry-lookahead adder first talk about static version, as follows:
at next we start about dynamic version of CLA and says:
1) we remove kill carry and propagate 0 transistor and add phi transistor as footer and clock.
my question is
I) what is different between Static and Dynamic
version, andII) What is the benefit?
III) what is the role of Footer
and clock?
Best Answer
In the dynamic case: you are charging a capacitor, and then draining voltage off of it based on the pull down network. \$\Phi\$ exists to set the initial condition on the node. What is not drawn is that you need a large enough capacitance to store charge on, so the inverter gate is larger than minimum. The drawback of this is that is all very timing dependent, so you cannot "stop" the clock. The advantage is that it has lower input capacitance than the static version. The lower input capacitance allows you to have a faster path.
In actual designs, you will build something with the static gates for testing and validation, and then pull those out and use the precharge version to get another 10% speed increase at the cost of power.