Electrical – Could a larger capacitor, at the output of the SMPS, destroy components with larger current draw when its being charged

In my experience, for most topologies the number of output capacitors required in a design is determined by the ripple current and not by the capacitance, because when you crunch the numbers, you'll find that the minimum capacitance you need to keep the output in regulation will be smaller than the ESR you need to keep the ripple voltage within reasonable limits (usually 1% of the DC output).

This is engineering, so it's always better to calculate rather than assume. Since you know the maximum load, the expected voltage on the capacitor and the on-time of the primary-side flyback switch (which is the period when no energy is transferred to the capacitor and it discharges to power the load) you can calculate how much the capacitor will discharge and determine what size of capacitor you need to keep reasonable regulation. Then, since you know the ripple current, you can calculate how many capacitors you need to keep the ripple voltage reasonable. Go with whichever calculation is larger.

Example

\$ \Delta V = \dfrac{I \times \Delta t}{C} \$

That is to say, a \$ 100 \mu F\$ capacitor being discharged by a 10A load over \$1 \mu s\$ will lose

\$ \Delta V = \dfrac{10A \times 1 \mu s }{100 \mu F} = 0.1V\$

Let's assume that the ESR of this capacitor is \$100 m \Omega\$ and the peak-to-peak ripple current is 4A (not unheard of for a flyback converter).

\$ \Delta V_{ripple} = \Delta I \times R_{ESR} \$

\$ \Delta V_{ripple} = 4A \times 100 m \Omega = 0.4V \$

SO: If 400mV ripple is too high, put more capacitors in parallel until the ESR is low enough to achieve the ripple you need.

As Olin commented, the stability of the converter is also a consideration when choosing output filter components, especially with flyback converters that operate in CCM. [If none of what I've taking about makes sense, you should seek counsel from someone experienced in power supply design.]

From the equation here we have

\$ I_{ref} = I_c(1 + \frac{2}{\beta})\$,so

\$I_c = \frac{I_ref}{1 + \frac{2}{\beta}}\$

where \$I_{ref} \approx \frac{12 - 0.6}{100k} = 0.114 mA\$.

From \$I = C\frac{dv}{dt} \$ we get \$ V(t) = \frac{I}{C}t\$.

Assuming the transistors in the current mirror have a high \$\beta\$ then \$ I_c \approx I_{ref}\$. The 555 timer upper comparator will fire when \$V_c = \frac{2}{3}V_{cc} = 8v.\$ Plugging these numbers in to the equation above along with the capacitor value and solving for t we get:

\$ 8 = \frac{1.14*10^{-5}}{470*10^{-6}}t \implies t \approx 330\$ seconds.

Even assuming that the capacitor is "ideal", high transistor beta, and that the 555 timer inputs draw no current, the actual charging time will probably be greater than this, due to the Early effect of the right hand transistor in the current mirror.