circuit-designdecoderdigital-logic
I want to design a full adder of one bit numbers using 2/4 Decoders and NOR gates.
I have the truth table: 
Now, what's confusing me are the inputs and outputs. The inputs for one DEC would be A and B, right? What do I do with Cin and Cout? Everything goes into the NOR gate and there's S, but how to get there?
It can help to add intermediate states to the truth table; there are a lot of letters from the alphabet you haven't used :-). Name the output of the first XOR gate D and add a D column to the truth table. You may want to have clearly separated "inputs", "intermediate" and "outputs". I separate them with a vertical line, and fill out the combinations for the inputs. You have three of those, that's eight combinations.
Then fill out column D, which takes A and B as inputs. Even if there were 15 more inputs, ignore them; only A and B are relevant. Work gate per gate, divide and conquer. When you've finished column D you can fill out column S in the "outputs" section, because that only depends on D and Cin, and you have those.
Repeat for the outputs of the AND gates: add E and F to the "intermediates" section, and fill them out only looking at the columns which are input for each gate.
Your mistake comes in your logic circuit schema. You have written s instead of c and vice versa. It should be as shown below:
Best Answer
If you are constrained to use decoders and NOR gates, the logic is a whole lot simpler if you redefine the carry inputs and outputs to be active-low instead of active-high. I'll present a solution based on this, and maybe it will provide some insight to your original problem.
simulate this circuit – Schematic created using CircuitLab
Actually, it only requires one additional gate to make them active-high, but I'll leave that as an exercise for the reader.