How can I implement the comparator of two 2-bit numbers using decoders DEC 2/4 and required logic gates? That comparator will be used to compare two 4-bit numbers. The comparator only has one output to show if the first number is bigger than the second. I created the truth table for the comparator:
A1 – higher positioned bit of the first number
A0 – lower positioned bit of the first number (mistake in the table)
B1 – higher positioned bit of the second number
B0 – lower positioned bit of the second number
X – is 1 if A>B <=> (A1>B1) + (A1=B1)(A0>B0)
And here's my solution using decoders 2/4 and required logic gates:
Even though I did the task, I'm not completely sure if it's correct.
What I don't understand is: How do these decoders function? It's like X will always be 1 if the conditions are made, the output of the comparator will never be 0. Please correct me if I'm mistaken or correct the solution.
Edit, new solution using the true logic of decoders (not demultiplexers), please check if it is good:
Best Answer
First let's see how to implement a function using single decoder. It is a straight-forward task having the truth table. Decoder will output
1on the lines selected by the input, so if we just "or" the outputs corresponding to the truth table lines with X=1, we will get the exact required function:Unfortunately there is no straightforward way to convert it to 2->4 decoders. But maybe we can divide the original function to smaller ones, suitable for 2->4 representation? Let's look at it. After some manipulations I've omitted here, the function can be represented as $$A_1B_1'+A_0B_0'(B_1'+A_1)$$ So we can see here three different 2-variable functions combined with ANDs and ORs:
1) \$A_1B_1'\$
2) \$A_0B_0'\$
3) \$B_1'+A_1\$
while (1) and (3) are functions of the same variables and can share decoder.
So the solution would be: Implement functions (1)-(3) using the method above, and interconnect the outputs using the gates: