The image of the part number you have shared implies that its a 2-Plane NAND Flash chip.
A Page is 2,048 + 64 Bytes long, 64 such pages forms one Block.
So,
size of 1 Block = size of 64 Pages
= 2,112 x 64 Bytes
= 1,35,168 Bytes
= 10,81,344 bits
= 1056 Kb
Now, 1 Plane consists of 1024 such Blocks.
So,
size of 1 Plane = 1024 x 2112 x 64 Bytes
= 1024 x 1056 Kb
= 13,84,12,032 Bytes
= 1,10,72,96,256 bits
= 1,056 Mb
Since the device has two such planes,
Memory size of 1 Device = 1,056 x 2 = 2,112 Mb.
Kindly note that 2112 Bytes each for Cache Register and Data Register are not being counted in the sum of total memory, since it is not a non-volatile memory.
Additionally, the advantage of having two blocks is:
- Memory can be divided into two physical planes, odd/even blocks
- Users have the ability to:
<•> Concurrently access two pages for read
<•> Erase two blocks concurrently
<•> Program two pages concurrently
Provided that, the page addresses of blocks from both planes must be the same during two-plane Read/Program/Erase operations.
The problem with secure erase is that the device has a translation layer in it. On a disk, writing to cylinder X sector Y will always overwrite the same area. On an SSD, the device firmware maintains a list of blank blocks and writes to the next one available, maintaining a table mapping logical addresses to actual flash blocks. There is usually a bit more flash than the stated capacity as spares, so a complete write may not touch every block. Erasing blocks is slow, so they are not erased immediately, and maybe not erased until space is short.
Drive firmware may offer three possible solutions to this. One is TRIM: tell the drive which blocks do not have filesystem data in, and let it preemptively erase them. One is a specific "secure erase" command, which should actually erase all the blocks (but takes a long time). And one is transparent block-level encryption, where asking the drive to discard the key instantly loses all the data. However, you're hostage to how well this has been implemented and there may be bugs.
I'm not aware of techniques for recovering data from flash cells that have actually been erased. (In fact it may lose bits spontaneously, so error correction is built in).
Best Answer
From wikipedia:
In other words \$V_{on}\$ on the gate forces a transistor to conduct. While \$V_T\$ only makes the transistor conduct if the bit has been programmed. That way you can read each transistor's programmed state independently by pulling everything but the transistor you want to read to \$V_{on}\$ and the transistor you want to read to \$V_T\$.