I'm trying to simulate a circuit for a design I'm making. In a few parts of what I'm interfacing with uses relays that when closed will short a few power supplies to the chassis ground and in LTSpice and Circuit lab there is no "chassis ground" or "earth ground" just one ground. It doesn't short the rest of the circuits with power supplies tied to their own grounds just a few spots these relays are used. I've been trying to find the answer on here and elsewhere and found Need help modelling the circuit with parasitic capacitance of a power supply in this scenario in SPICE where he just hand drew it but is there a way to make it with subskt or is there a proper way to simulate this that won't skew my sim in weird ways?
Electrical – LTSpice chassis ground or earth ground
groundingltspiceshort-circuit
Related Solutions
This is a very complex issue, since it deals with EMI/RFI, ESD, and safety stuff. As you've noticed, there are many ways do handle chassis and digital grounds-- everybody has an opinion and everybody thinks that the other people are wrong. Just so you know, they are all wrong and I'm right. Honest! :)
I've done it several ways, but the way that seems to work best for me is the same way that PC motherboards do it. Every mounting hole on the PCB connects signal gnd (a.k.a. digital ground) directly to the metal chassis through a screw and metal stand-off.
For connectors with a shield, that shield is connected to the metal chassis through as short of a connection as possible. Ideally the connector shield would be touching the chassis, otherwise there would be a mounting screw on the PCB as close to the connector as possible. The idea here is that any noise or static discharge would stay on the shield/chassis and never make it inside the box or onto the PCB. Sometimes that's not possible, so if it does make it to the PCB you want to get it off of the PCB as quickly as possible.
Let me make this clear: For a PCB with connectors, signal GND is connected to the metal case using mounting holes. Chassis GND is connected to the metal case using mounting holes. Chassis GND and Signal GND are NOT connected together on the PCB, but instead use the metal case for that connection.
The metal chassis is then eventually connected to the GND pin on the 3-prong AC power connector, NOT the neutral pin. There are more safety issues when we're talking about 2-prong AC power connectors-- and you'll have to look those up as I'm not as well versed in those regulations/laws.
Tie them together at a single point with a 0 Ohm resistor near the power supply
Don't do that. Doing this would assure that any noise on the cable has to travel THROUGH your circuit to get to GND. This could disrupt your circuit. The reason for the 0-Ohm resistor is because this doesn't always work and having the resistor there gives you an easy way to remove the connection or replace the resistor with a cap.
Tie them together with a single 0.01uF/2kV capacitor at near the power supply
Don't do that. This is a variation of the 0-ohm resistor thing. Same idea, but the thought is that the cap will allow AC signals to pass but not DC. Seems silly to me, as you want DC (or at least 60 Hz) signals to pass so that the circuit breaker will pop if there was a bad failure.
Tie them together with a 1M resistor and a 0.1uF capacitor in parallel
Don't do that. The problem with the previous "solution" is that the chassis is now floating, relative to GND, and could collect a charge enough to cause minor issues. The 1M ohm resistor is supposed to prevent that. Otherwise this is identical to the previous solution.
Short them together with a 0 Ohm resistor and a 0.1uF capacitor in parallel
Don't do that. If there is a 0 Ohm resistor, why bother with the cap? This is just a variation on the others, but with more things on the PCB to allow you to change things up until it works.
Tie them together with multiple 0.01uF capacitors in parallel near the I/O
Closer. Near the I/O is better than near the power connector, as noise wouldn't travel through the circuit. Multiple caps are used to reduce the impedance and to connect things where it counts. But this is not as good as what I do.
Short them together directly via the mounting holes on the PCB
As mentioned, I like this approach. Very low impedance, everywhere.
Tie them together with capacitors between digital GND and the mounting holes
Not as good as just shorting them together, since the impedance is higher and you're blocking DC.
Tie them together via multiple low inductance connections near the I/O connectors
Variations on the same thing. Might as well call the "multiple low inductance connections" things like "ground planes" and "mounting holes"
Leave them totally isolated (not connected together anywhere)
This is basically what is done when you don't have a metal chassis (like, an all plastic enclosure). This gets tricky and requires careful circuit design and PCB layout to do right, and still pass all EMI regulatory testing. It can be done, but as I said, it's tricky.
2) I highly recommend AGAINST cutting ground anywhere near high-speed signals. Stray capacitance really doesn't have too much of an effect on digital electronics. Usually stray capacitance kills you when it acts to create a parasitic filter at the input of an op amp.
In fact, it is highly recommended to run your high-speed signals directly overtop of an unbroken ground plane; this is called a "microstrip". The reason is that high frequency current follows the path of least inductance. With a ground plane, this path will be a mirror image of the signal trace. This minimizes the size of the loop, which in turn minimizes radiated EMI.
A very striking example of this can be seen on Dr. Howard Johnson's web site. See figures 8 and 9 for an example of high-frequency current taking the path of least inductance. (in case you didn't know, Dr. Johnson is an authority on signal integrity, author of the much lauded "High-Speed Digital Design: A Handbook of Black Magic")
It's important to note that any cuts in the ground plane underneath one of these high-speed digital signals will increase the size of the loop because the return current must take a detour around your cutout, which leads to increased emissions as well. You want a totally unbroken plane underneath all your digital signals. It's also important to note that the power plane is also a reference plane just like the ground plane, and from a high-frequency perspective these two planes are connected via bypass capacitors, so you can consider a high-frequency return current to "jump" planes near the caps.
3) If you have a good ground plane, there's pretty much no reason to use a guard trace. The exception would be the op amp I mentioned earlier, because you may have cut the ground plane underneath it. But you still need to worry about the parasitic capacitance of a guard trace. Once again, Dr. Johnson is here to help with pretty pictures.
4.1) I believe that multiple small vias will have better inductance properties since they are in parallel, versus one large via taking up approximately the same amount of space. Unfortunately I cannot remember what I read that led me to believe this. I think it's because inductance of a via is linearly inversely proportional to radius, but the area of the via is quadratically directly proportional to the radius. (source: Dr. Johnson again) Make the via radius 2x bigger, and it has half the inductance but takes up 4x as much area.
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Best Answer
Due to the nature of the SPICE (ever since 40+ years), the ground (
0,GND) node is global, but just a net, like all nets. And all nets can be renamed to whatever name/label/etc is needed. In this case, that chassis you're looking for, in whichever SPICE software, is just a cosmetic appearance for a net/node, labeledchassis, orearth, or whatever. In LTspice there is only one cosmetic like that, calledCOM, but which has the same functionality of a common node (likechassis,earth, etc, unless mentioned otherwise). It, too, needs to be referenced to ground, so some connection is needed, if you so choose to use it. This is true for whichever SPICE program that uses those nodes as floating nodes. Here's a minor example of usage:Note the
R2that connects the triangular shape ground (the ground,0,GND) to the cosmeticCOM. Its value is1gto simulate a separate, floating ground, but really it's there with the sole purpose of providing a reference to ground without which the solver cannot calculate. Also, the plot showsV(2,COM), which is just a local reference for probing; can be anything, really.