Electrical – MOSFET failing test

No, also for P-channel MOSFETs it's charging them. The confusion probably stems from the voltage you see at the lower side, which goes to ground (or near it). But that voltage isn't important, a capacitor's charge is determined by the voltage across it:

\$ Q = \Delta V \cdot C \$

So decreasing the gate voltage increases the gate-source voltage difference, which increases the charge of the capacitor.

When you switch off T1, there's current flowing from +12 V through R2 to the gate to discharge it's capacitance.

edit re the update of your question dd. 2012-07-09(*)
Turning off means that you discharge the gate to +5 V, and this happens by current through R2 and D3. So you bypass R? but R2 is still the limiting factor. A solution would be to swap R2 and T1, so that there's more current/less resistance to discharge the gate than to charge it.

\$ \$

_{(*) I'm using the ISO 8601 standard date format here. We have user from all over the world and for some 9/07 means 9 July, for others it's 7 September. ISO 8601 is unambiguous.}

From the driver to the gates, the wires are ~15cm. Does this cause rining?

Almost certainly, and it's a fair bet that this is destroying your MOSFETs, by one or more of these mechanisms:

1. exceeding \$V_{G(max)}\$ even for the briefest instant
2. exceeding \$V_{DS(max)}\$
3. simple overheating due to slow switching and unintended conduction

#3 should be pretty obvious when it occurs, but the other two can be hard to see, since they are transient conditions that may be too brief to be visible on the scope.

C2 and C3 are not decreasing the ringing. You get ringing on the gates because the capacitance of the MOSFET gate (and C2, C3 which add to it) plus the inductance formed by the loop of wire through the driver and the MOSFET gate-source form an LC circuit. The ringing is caused by energy bouncing between this capacitance and inductance.

You should put the driver absolutely as close to the MOSFETS as possible. 1cm is already getting to be too long. Not only does the inductance created by the long trace to the gate cause ringing, but it limits your switching speed, which means more losses in the transistors. This is because the rate of change of current is limited by inductance:

$$ \frac{v}{L} = \frac{di}{dt} $$

Since \$v\$ is the voltage supplied by the gate driver and you can't make that any bigger, the time it takes to increase the current from nothing to something is limited by the inductance \$L\$. You want the current to be as much as possible, as soon as possible, so that you can switch that transistor fast.

In addition to putting the gate driver close to the MOSFETs, you want to minimize the loop area of the path the current through the gate must take:

^{simulate this circuit – Schematic created using CircuitLab}

The inductance is proportional to the area illustrated.

The inductance limits the switching speed, and it also limits how well the gate driver can hold the MOSFET off. As the drain voltage on the MOSFET that just turned off changes (due to the other MOSFET turning on, and the mutual inductance of the coils), the gate driver must source or sink current as the internal capacitances of the MOSFET charge or discharge. Here's an illustration from International Rectifier - Power MOSFET Basics:

In your case, if the gate traces are long, then \$R_G\$ is also an inductor. Since the inductor limits \$di/dt\$, the gate driver can only respond so quickly to these currents, and then there is significant ringing and overshoot in the resonance between the gate trace inductance and the MOSFET's capacitance. Your C2 and C3 just serve to change the frequency of this resonance.

As the gate voltage is ringing, it sometimes crosses over \$V_{th}\$ of your MOSFETS, and one begins to conduct a little when it should be off. This changes the current and voltage of the connected inductor, which is coupled to the other inductor, which introduces these capacitive currents in the other MOSFET, which can only exacerbate the problem. But, when the coils aren't powered, then the drain voltage is at 0V regardless of the transistor switching, and these capacitive currents (and consequently, the total gate charge that must be moved to switch the transistor) are much less, so you see much less ringing.

This inductance can also be coupled magnetically to other inductances, like your solenoid coils. As the magnetic flux through the loop changes, a voltage is induced (Faraday's law of induction). Minimize the inductance, and you will minimize this voltage.

Get rid of C2 and C3. If you still need to reduce ringing after improving your layout, do that by adding a resistor in series with the gate, between the gate and the gate driver. This will absorb the energy bouncing around which causes the ringing. Of course, it will also limit the gate current, and thus your switching speed, so you don't want this resistance to be any larger than absolutely necessary.

You can also bypass the added resistor with a diode, or with a transistor, to allow for turn-off to be faster than turn-on. So, one of these options (but only if necessary; it's much preferred to simply eliminate the source of the ringing):

^{simulate this circuit}

Especially in the last case with Q3, you have essentially implemented half of a gate driver, so the same concerns of keeping the trace short and the loop area small apply.