I was wondering what happens when VCE voltage becomes negative? suppose I am forwarding both junctions (no resistors). I know that saturation happens when VCE is between 0.1V- 0.3V but what happens below that range (V1 > V2) as in the following scheme?
simulate this circuit – Schematic created using CircuitLab
Best Answer
The definition of saturation is that both junctions be in forward bias. So, with appropriate voltages for V1 and V2, your transistor would be operating in the saturation region. It would be important for the voltages to be not too large, otherwise very large currents would flow and destroy the device.
The circuit is difficult and confusing because of the way it is drawn. For example, you chose to label the common positive node of the two supplies as GND. It may have been better to leave GND out of it.
Depending on the specific voltages of V1 and V2, net current flow might be from emitter to collector or collector to emitter. Because of the differences in the two junctions, detailed predictions about current and voltage are somewhat difficult.