power-dissipationsurface-mount
I'm creating a footprint for the TPS2141 (LDO and current limiter) and I wonder if the thermal pad should be connected to the GND plane or if thats a bad idea? Should it just have its own copper zone that´s not connected to anything?
Thermally it should be very beneficial to connect it to the ground plane I guess.
I don't know if there's other ways to do it, but the ground pad is going to end up being a pin of some sort. You could try drawing something in the module editor that suggests a pad, but in the end it comes down to pins. Make a pin on the schematic part and call it (the pin number) "PAD". Similarly, call/number the ground pad on the footprint "PAD". Then if you link PAD to ground on the schematic, the connection will get into the netlist. You also might want to add some text in the schematic about the thermal pad.
Sorry, my bad. I posted this image from the CY8C32 datasheet into my answer to the other question:
but didn't copy the caption. "Figure 2-8. Example PCB Layout for 100-pin TQFP Part for Optimal Analog Performance". This is for the TQFP100 part, which doesn't have the thermal pad, and doesn't apply to the QFN48 you're using.
For parts with a thermal pad the split makes no sense, and you should connect the thermal pad to digital ground.
The center pad on the QFN package should be connected to digital ground (VSSD) for best mechanical, thermal, and electrical performance. If not connected to ground, it should be electrically floated and not connected to any other signal. (page 6)
Note that when you use a thermal pad on your PCB that you shouldn't apply solder paste all over it, but use a windowed stencil to avoid the IC being pushed up by the solder paste:
"The solder paste pattern area should cover 35 % of the solder land area. When printing solder paste on the exposed die pad solder land, the solder paste dot area should cover no more than 20 % of this solder land area. Furthermore, the paste should be printed away from the solder land edges. This is illustrated in Figure 9; the solder paste pattern area lies within the boundary indicated by the red line and it is divided by the entire solder land area." (from here)
Further reading
CY8C32 datasheet
HVQFN application information, NXP application note
Best Answer
There is a whole page in the datasheet dedicated to the thermal pad, which specifies handling as in the document at http://www.ti.com/lit/an/slma002h/slma002h.pdf
That document specifies "Check the respective product data sheet to verify which signal, power, or ground plane the device should be soldered to"
Given the absence of handling in the product data sheet, I would contact TI if this is important. I would also choose not to design around that part if I couldn't get an authoritative answer, in writing, and move on to the next part that would suit my needs.
Update: It looks like https://www.ti.com/lit/an/slma004b/slma004b.pdf now specifies that the thermal pads can be connected to the ground plane. Still wishy washy enough to merit a check with TI