Electrical – the maximum slaves supported by SPI and how it is limited

A few points. That Maxim article targets a specific type of spi device. Mainly ones that are write only. Notice only MOSI is shown, not MISO. Additionally, these devices are chained, so data is shifted from one device to the other, like a shift register. (One common use of SPI peripherals on a microcontroller is to use them to drive common shift registers.)

SPI does not require the master to receive data. A slave is not required to respond. You can even have read only SPI devices, where the Master just clocks in data from the Slave (Only uses MISO). You can even have a 3 wire variation where MOSI and MISO are tied together (half duplex only). It all depends on the type of spi device you are using. Additionally, SPI can do Full Duplex transfers, but not all devices support this. As Wikipedia states, most devices do half duplex, even when wired in 4-wire mode.

In that note, the SPI devices are write only.

As for the clock frequency question, there is no auto negotiation of clock speeds. This is decided while the master is being programmed. You have to account for it.

First, you have identified a really annoying part of SPI on the AVR: Connecting SPI slaves will interfere with the proper operation of ICSP.

Second: The SPI bus has MISO, MOSI, and a chip select pin. You can break out the MISO, MOSI and GND pins, and perhaps VCC, plus a different CS pin for each daughter board you want to connect. As long as the CS is not active for the daughter boards, and the daughter board chips do not try to use the bus in master mode, you should be OK.

Third: You can use a buffer chip of some sort (perhaps 74HC125 or similar) with a tri-state function to isolate the ICSP feature from the SPI-talking-to-slaves feature; set the buffer chip up to require a particular pin high to let signals through, and use software to pull that pin high only when your code wants to talk to the slaves, and keep it low after a code reset.