I'm playing around with a diode as AM demodulator and have stumbled upon a phenomenon that seems logical but I can't reproduce it in LTSpice. My setup is the following:
simulate this circuit – Schematic created using CircuitLab
U_in is a sine wave with amplitude of about 0.5V and a DC-Offset of 2.5V.
$$ U_{in} = 2.5V + 0.5V * sin(wt) $$
Now when I measure the voltage after the decoupling capacitor, which is supposed to strip the DC bias, I get a sine wave with \$ U_{max} = 200 mV \$ and \$ U_{min} = -800 mV \$.
So far, so good. My interpretation of this is that the positive half wave is passed through the diode above the forward voltage of about 200 mV while the negative half wave is blocked by the diode and generates a negative DC offset on the right side of the capacitor.
I know that I can align the signal around 0V by adding a DC return path after the decoupling cap.
The question is why I cannot reproduce this behaviour in LTSpice. Even when using a detailed capacitor model with ESR and parallel resistance, adding the scope input (1Meg, 15p, 10:1) to the simulation and trying different diodes, the result will always be a sine wave that is offset by at most 10 mV. If it wasn't for the measuring utility, I'd say there wasn't any DC bias at all.
Am I missing something? Is there some parasitic parameter I'm not taking into account?
Here is a screenshot of my simulation, the green trace is the (wrong) simulation, the blue trace is what I see on the real world scope:
Any help would be greatly appreciated!
Kind Regards
Best Answer
You should know that, because of the reactive elements, there can be some transients that can confuse if left only for a short time. In this case, you can run the simulation with
.tran 500u uic(to be sure it starts everything from zero), and make that end resistance100, as in the original picture, otherwise you'll have to wait even longer. I didn't have your diode, so I just used the ol'BAT54, but that shouldn't make too much of a difference in this case.