Electronic – 12V signal convert to 5V without interfere

At some point in my life, I used to run the USB business for big semi company. The best result I remember was NEC SATA controller capable of pushing 320Mbps actual data throughput for mass storage, probably current sata drives are capable of this or slightly more. This was using BOT (some mass storage protocol runs on USB).

I can give a technical detailed answer but I guess you can deduce yourself. What you need to see is that, this is ecosystem play, any significant improvement would require somebody like Microsoft to change their stack, optimize etc, which is not going to happen. Interoperability is far more important than speed. Because existing stacks carefully cover the mistakes of slew of devices out there because when the USB2 spec come out probably the initial devices didn't really confirm to the spec that well since the spec was buggy, the certification system was buggy etc. etc.. If you build a home brew system using Linux or custom USB host drivers for MS and a fast device controller you can probably get close to the theoretical limits.

In terms of streaming, the ISO supposed to be very fast but controllers do not implement that very well, since 95% of the apps use Bulk transfer.

As a bonus insight, for example, if you go and build a hub IC today, if you follow the spec to the dot, you will practically sell zero chips. If you know all the bugs in the market and make sure your hub IC can tolerate to them, you can probably get in to the market. I am still amazed today, how well USB is working given number of bad software and chips out there.

When it is charging (input to the transistor low), it is charging towards 10V through a resistance of 6.45K ohms (the Thevenin equivalent source resistance of the divider plus the 4.7K resistor), and when it is discharging (input to the transistor high) it is discharging through a resistance of 4.7K ohms (to maybe 50mV- the VCE of the saturated transistor- it won't make much difference so I'll guess at it- you can refer to the datasheet for a slightly better value).

For steady state, assume the voltage is fixed (does not change during a cycle), so we know the current charging must equal the current discharging if the times are equal (ask if that is not obvious).

So (10 - Vc)/6.45 = (Vc - 0.05)/4.7

solving, Vc = 4.244V. (Even worse!)

I don't know where the value in your simulation comes from but there will be lot of ripple in the voltage with such a small capacitor. Figure about 0.001 second * 0.9mA/10^-6 = 0.9V, so +/-450mV ripple (about 10%), so perhaps it's the peak voltage, not the mean-> 4.244 + 0.45 = 4.694, which agrees with your simulation.

You can use a more symmetrical drive either by increasing the 4.7K to a much higher value or using a CMOS buffer that will also get rid of the Vce(sat) term. Just remember that the buffer does not make this issue magically go away, and if you have a relatively low resistance compared to the buffer output impedance, and that impedance is asymmetrical (as it usually is) you may not see the exact voltage you're expecting.

Note that using a highly asymmetric switch like this one introduces a significant nonlinearity, which may be undesirable. In this case, it's about -15% of signal at mid-scale or -7.6% of full scale.