When I implement a "safe" state machine in Quartus, what is the difference between a normal/unsafe state machine?
Edit: And is this the same as:
case state is
...
when others =>
nextState <= idle;
end case;
if you don't take into account that the synthesizer ignores this "when other"?
Best Answer
A safe state machine in Quartus is a state machine that if it reaches an illegal state (for any exceptional reason, such as glitch, metastability, etc.), it will reach the reset state after one clock cycle.