My favorite electronics book is "High Speed Digital Design: A Handbook Of Black Magic". I highly recommend this book. It seems expensive, but it is totally worth the money. This book has 12 pages on choosing a bypass cap! The author, Howard Johnson, also teaches some classes with decoupling caps as one of the topics.
Some important things that I've learned over the years, and have been backed up by this book, is that the "standard practices" with decoupling caps are almost always wrong and there is more art than science when it comes to choosing and routing them.
There are lots of calculations that you can do regarding decoupling caps, but much of those are not accurate due to many things. The caps themselves are vary wildly (especially the higher dielectric caps like X7R). The PCB layout changes things greatly (and you'll need to think in 3-D for this one). Temperature and voltage will change the behavior of the caps. A single cap will behave as both a "power supply smoothing cap" and a "AC signal return bypass cap". Etc.
What Johnson did was, after a lot of experimentation, figure out that inductance is the most important factor and it swamps almost every other consideration. So the goal when selecting and placing decoupling caps is to use a lot of physically small caps, with the highest practical value, and route them so the total inductance is as low as possible.
The ideal would be to use lots of 0.1 uF caps in an 0402 package. Place them under the chip on the back side of the PCB. The cap be routed as in the image below. And the vias go directly to the power/ground planes (not to the chip's power pins, as that would usually increase the inductance). If you place the cap under the chip then sometimes you could share the same via without any issues.
The reason why a 0.1 uF cap was chosen is because it is the highest practical in an 0402 package. The reason why 0402 was chosen is because it is the smallest practical size, and you want to use a lot of them to get the effective ESL/ESR down. Of course all bets are off if you have a 2 layer PCB without power and ground planes.
I don't want to belittle the use of the math, that is important, but the complexity of power supply decoupling and AC return paths often makes the math not so practical in the real world. In the real world, a "rule of thumb" really helps. Of the many rules of thumb for this topic, it has only been Howard Johnson that has proven the other rules don't work and provided this better rule. My experimentation and experiences has shown this to be true.
You are correct. Generally speaking, capacitors must not be subjected to voltages higher than what they are specified for. In practice, one always chooses a capacitor with voltage rating somewhat in excess of the highest voltage the capacitor might be exposed to. For example, I would choose a 63V capacitor for a circuit running at 45V.
Your circuit is running at plus minus 20V. A capacitor voltage rating of 25V is marginal, so I would choose a capacitor voltage rating at 35V or more. Your 50V capacitor will be just fine.
Best Answer
You are talking about so small capacitances that you don't need any discretes to achieve them. According to [1] the capacitance of an 1206-size components pad is about 0.72 pF. Therefore there is no point in creating discrete capacitors smaller than about 10 pF because it is easier to embed them into the PCB and you get smaller parasitics too [2].
The second reference I used talks about some fancy dedicated PCB materials for embedded capacitors, but you can also use regular FR4 PCBs. Howevere, you are most probably going to need impedance control. Calculators and equations for PCB embedded capacitors are readily available by googling i.e. http://chemandy.com/calculators/rectangular-capacitor-calculator.htm.
[1] http://www.sigcon.com/Pubs/edn/parasiticpads.htm
[2] https://multimedia.3m.com/mws/media/251029O/fabrication-of-embedded-capacitance-printed-circuit-boards.pdf