Electronic – BJT DC Leakage (ICES) dependency with Vce

From the graphs we see that gate leakage currents of all transistors decrease with increasing \$T_{OX}\$. This means that the increase in total leakage current must be attributed to subthreshold conduction.

Why would subthreshold current increase? The following equation for subthreshold curent appears in BSIMv4.7 User's Manual:

While there are many parameters involved, the main suspect is the treshold voltage, \$V_{th}\$, which is known to be sensitive to gate oxide thickness (as well as almost any other transistor's parameter).

In order to verify this I built the following circuit:

Sweeping \$T_{OX}\$ and measuring \$V_{th}\$ resulted in:

This linear decrease in threshold voltage explains an exponential increase in subthreshold leakage (based on the above equation).

The natural continuation of the answer would be to explain why \$V_{th}\$ decreases with \$T_{OX}\$. The equation used to calculate the threshold voltage for BSIMv4.7 model in Spice is:

\$T_{OX}\$ dependence appears in the above equation both explicitly (TOXE) and implicitly (through other parameters which depend on \$T_{OX}\$). It is beyond my expertise and knowledge to perform this task and map various numerical parameters into physical effects taking place in the actual transistor.

In summary:

The reduction in threshold voltage due to thicker oxide leads to higher subtreshold leakage current. The exact effects which cause the reduction are very complex.

Let's have a look at the datasheet:

At room temperature the maximum leakage is 15nA at 30V, implying a 150mV voltage. It will be less at 3V, but not necessarily proportionally less. The maximum leakage at a Tj of 150°C is 5uA which would be excessive. So, how much of that is because they don't want to make time consuming low-current tests on an inexpensive part? Here's a typical curve from a similar part (2N4401) which shows you might typically run into trouble around 100°C Tj (50nA).

It's usually considered bad engineering to depend on typical values (though you see it done with careful forethought all the time in many commercial products), but I have to conclude that it is unlikely (approximately zero percent likelihood) that ICBO leakage is causing the problems in your setup.

Note that this is the leakage with Vbe ~=0. If you leave the base open or (worse) have it connected to something that acts as an antenna, all bets are off. As Dave Tweed points out the gain of the transistor can amplify the current if you leave the base open. It could conceivably have a gain of 100 at 1nA Ib. So, don't do that! Make sure there is a resistance from base to emitter when you want the transistor 'off'. Even 1M from base to emitter is enough to make that problem go away- more likely you're driving it from a push-pull output and it will have a very low resistance to keep the ICBO current from being amplified.