Is it possible to manufacture semiconductors in a way that places logic (for example, a CPU core) on the same die with non-volatile flash (or other EEPROM memory) circuits? What about DRAM?
It certainly seems to be possible to have on-CPU-die SRAM (in the form of various caches); is there a technical reason that DRAM and non-volatile memory can't be included? Is this because SRAM consists of the same or very similar transistors as the CPU logic?
Or is that simply a matter of economics (being able to combine various CPU and memory types without expensive chip redesigns)?
Are there some specialized applications where those different semiconductor types are still combined on the same die because of space requirements (I'm thinking about things like smart cards which contain at least a CPU, ROM and some NVRAM)?
Best Answer
It is. Microcontrollers generally contain logic, Flash, and SRAM all on one die. But they are not designed to be high performance chips, and they are generally made with 'old' processes.
This is generally not done for high performance devices for several reasons. First is process optimization. The optimal process characteristics for high performance DRAM, high performance Flash, and high performance logic are generally different and comprimises must be made to combine them on one chip. Second, yield. If your RAM array doesn't test out, the chip gets canned even though the flash and logic are good. So it is generally not done for very complex chips because the yield would be too low to be economical. It also means that the flash and RAM sizes are fixed so it is not possible to select different sizes of Flash or RAM for different applications.
Flash and RAM also take up a huge amount of silicon area and there is far more demand for flash and RAM than for any given CPU design, so economies of scale drive down the cost flash and RAM chips far more than the CPUs. Because of this, designers try to make the CPU dies as small as possible to minimize the cost of production - all else being equal, the cost per area of the CPU die will be higher the cost per area of off-the-shelf memory chips.
This is also the main reason devices like FPGAs do not often contain flash memory - it is hard enough to get the programmable logic working that they really don't want to sacrifice yields by adding a flash array that is only used on power up.