I'm trying to simulate charging of one capacitor \$C_2\$ by another \$C_1\$ using LTspice. Following the derivations in this video, I found that in the end, both capacitors \$C_1\$ and \$C_2\$ should end up with a voltage of \$ \frac{C_1*V_0}{C_1 + C_2} \$, where \$V_0\$ is the voltage to which \$C_1\$ is initially charged. I have attached figures here showing my simulation and my result.
Initially, \$C_1\$ and \$C_2\$ are both at 0 V, as expected. After 10 ms, when S1 is closed, \$C_1\$ charges. With a time constant of 1 ms, \$C_1\$ charges fully in about 5 ms, as expected. After 20 ms, S2 is opened back up, and, as expected, \$C_2\$ retains its charge. (At this point, \$C_2\$ has already begun to charge slightly, which contradicts my expectations.) After 30 ms, when S2 is closed (while S1 is still open), I expect \$C_2\$ to charge up while \$C_1\$ discharges until they meet somewhere in the middle. However, I see a rapid drop in voltage on \$C_1\$ and a sharp increase and decrease in voltage on \$C_2\$.
I am not sure why this is but I have tried a couple of modifications. First I added a 1 k-ohm resistor in series with C2. The simulation and results are shown below. I'm not sure why how or why closing S2 causes the voltage on \$C_1\$ to change so rapidly (that too, for \$C_1\$, up to 16 V, which is well beyond the voltage Vin = 5V to which the capacitor was charged) and why the simulation abruptly stops displaying the voltage across \$C_2\$ at around 33 ms.
Finally, I decided to try a buffer amplifier instead of a resistor. The simulation and results are shown below. I'm again unable to explain why the voltages across \$C_1\$ and \$C_2\$ behave so erratically.
Could someone please explain what prevents the second capacitor from charging off the first?
Is there a way I could modify my simulation to get this to work?
This is actually a small part of a much larger circuit that I need to get working, so any help would be greatly appreciated.
Best Answer
I got yours to work, but I had to change a few things:
I had to change the timestep of the solver, this might be a problem because of the low amount of resistance the solver is seeing which would create a very large current between the caps. This is hard for the solver as it creates a ~200kA signal.
In a sense, the matrix has a 'dynamic range' if you put in signals that are too large in with signals that are small, it can have a hard time finding the solution. If you see spices that are anomalously high or low, you might want to insert parasitics into your design (especially physical parasitics such as plane to plane capacitances and resistances that of the copper running through a wire or a trace). What you have created here are two super capacitors separated by a superconducting switch.
The first thing I tried was a very fine timestep, which worked well with a different simulation (which I'll show below). The second thing I did was separate the models of the switches, I think this might help the matrix be a little more stable, in case it doesn't copy the model.
Now that I've written what I had above, another thing I did was drop the resistances down to 1e-7 (which is something more physical) but more importantly it's going to create currents and voltages that are below the abstol and voltol settings for the solver which are usually around 1e-12 or 1e-15. A resistance of 1e-15 is going to hit the lower tolerance limit for the solver and it won't be able to resolve the voltage. Just changing the resistance solved it for me also. (notice it dropped the current also and the shape of the spike is different.
Here is an interesting way to simulate cap to cap charging if you're interested: