Electronic – Circuit to turn microcontroller on when reed switch state changes (to monitor door lock state)

Dampmaskin has the right idea, but his design is overly simplistic, for the reasons I outlined in my comments.

A more robust circuit would look like this:

^{simulate this circuit – Schematic created using CircuitLab}

R1 and R3 make sure that leakage currents in either transistor won't cause unwanted activation of the circuit.

Obviously, the micro must set the GPIO pin high as soon as possible after it comes out of reset, before C1 discharges too far (make C1 larger if necessary). Then, it can set the pin low (or tristate it) when the task it is doing is complete.

You can substitute MOSFETs for the BJTs if you like, in which case, R2 and R4 are not needed (but they cause no harm, either).

Added:

An XOR (Exclusive OR) gate (or XNOR) can be used to produce an output pulse on the rising or falling edges of an input signal. An XOR 'truth table' is:

IN Out

00 0
01 1
10 1
11 0

ie - the output is high when one only input is high. Both inputs low or both inputs high produce a low output.

In the diagram below the RC combination acts as a delay that causes any input level change to be delayed in arrival time at the RC connected input relative to the directly connected input. When a continuous high or low is input, both XOR inputs are the same polarity and output is low.
When the input level transitions there is a period of about t = R1 x C1 when the two inputs are not the same and an output pulse is produced.
Ideally Schmitt triggered inputs would be used, but std inputs "work OK" - subject to there being no input transients.

The RC only consume energy when the capacitor charges or discharges and this can be very small so the circuit achieves extremely low power consumption. CMOS gates when not switching draw sub microamp currents.

You can get single XOR gates in a package so small it's almost a breathing hazard. One of many is 74AHCT1G86SE-7

^{simulate this circuit – Schematic created using CircuitLab}

______________________________

Something as simple as this may work for you depending on overall application (as sometimes unspecific "extras" complicate the requirement).

This shows the general principle and you may have to 'play' somewhat.

/RST is assumed to have an internal pullup to Vdd. If not, one can be added.

Initially, SW1 open = uC sleeping.
SW1 closed = /RST low and Cd is charged low. SW1 open releases /RST and processor come out of sleep.
Cd level can be read via GPIO.
Cd level returns to Vdd = high after a period > t= RdCd.

If the switch is the only thing that brings the processor out of sleep then the GPIO read and no circuitry is needed except apart from the switch and a pullup for /RST (internal or external).

^{simulate this circuit}