How might a comparator with only logic gates look like? Isit like:
Best Answer
Your answer looks fine as is (assuming an XOR is counted as a logic gate (and I can't see why not).
You can reduce gate count by one by using an 8 input NAND or AND at the output. eg 74xx30 8 input NAND.
If your XOR gates were open collector you could connect all their outputs, add one resistor and remove the AND gates. Depends wheher your rules allow a resistor pullup with an open collector gate.
I would probably use two bits to encode the three switches, and the general approach would be to have a string of pairs (one for each bit) of D or JK flip-flops to accept the sequence of input digits, essentially a shift register for pairs of bits. Then there would have to be de-bounce circuitry for the switches, and some way to generate a clock signal from the key presses (probably on release) to shift the digits through the register. Finally, XOR gates between the stages of the shift register and the digits of the key (hardwired to 1231 or use switches, etc) would produce signals to indicate when each digit is a correct match (logic Low on match), and then a multi-input NOR of the XOR outputs would give a final output signal that would indicate when the entire sequence in the shift register matches the key.
It should be easier to implement "equals" with XOR than with AND and OR. Take a look at the Karnaugh map for a single bit of "equals" and then look at the Karnaugh map for XOR.
I assume you have NOT as well (at least for your variables? (otherwise I don't know how you did it with AND and OR alone.)) If you don't have NOT, then XOR can be used to fake one:
A XOR 1 = NOT A.
For the "greater" and the "less": In the worst case you can take your answer in sum-of-products form and turn it into all NAND gates (by DeMorgan AB+CD = (A NAND B) NAND (C NAND D)). But you can probably do better. Again: look at the Karnaugh map for your problem. Then look at the Karnaugh map for (2-bit) XOR. Any time you have a checkerboard-like pattern in your Karnaugh map you can probably put an XOR to good use.
Best Answer
Your answer looks fine as is (assuming an XOR is counted as a logic gate (and I can't see why not).
You can reduce gate count by one by using an 8 input NAND or AND at the output. eg 74xx30 8 input NAND.
If your XOR gates were open collector you could connect all their outputs, add one resistor and remove the AND gates. Depends wheher your rules allow a resistor pullup with an open collector gate.