Electronic – Cooling for D2PAK dissipating 30W

To directly answer your first question: No, not even close. A little more copper around a surface mount part isn't going to get rid of 11W of heat. No way.

One answer may be to parallel multiple FETs. Not only does that cut the total dissipation by the number of parts, but the dissipation on each FET is reduced by the square of the number of parts. So if one FET dissipates 10W, then two parallel FETs would dissipate 5W total, and each FET would dissipate only 2.5W.

That's in theory. In practise they won't share the load exactly equally, so you have to design for a bit worse than that per FET. The good thing about paralleling FETs is that they have a positive temperature coefficient. The Rdson goes up with temperature. This helps them ballance somewhat and prevents runaway of a single part, like could be the case with bipolar transistors.

Ultimately you have to decide what you really want. Switching 40A is going to make some heat. One way or the other you're going to have to deal with that. You can tell us you're space contrained all you want, but ultimately the physics will dictate a certain amount of space, surface area, forced cooling, or whatever. It may not be possible to meet all the constraints. Not all combinations of small size, high current, and low cost are possible.

Maybe, maybe not, but I'd ask why you are not correlating hot chips with power supply currents, and why you're not putting a temperature sensor on the heatsink. If the thermal path from the die to the heatsink is impaired you'll get a different temperature differential between the die and the heatsink. Likewise, if the chip is drawing more current you should be able to predict the final temperature of the die based on normal thermal behavior. And measuring the heatsink temp doesn't require a dedicated contact sensor: a temporary one will do, or a non-contact IR unit should work, since the emissivity of the heat sinks should be pretty uniform.

As to why the maybes, consider the following model:

^{simulate this circuit – Schematic created using CircuitLab}

If the thermal resistance from the die to the heatsink is much larger than the thermal resistance of the heatsink to ambient, and the thermal capacity of the die is much less than the capacity of the heat sink (and I would guess both to be true), the latter is the dominant factor in determining the thermal time constant of the heatsink, and thus of the die. In this case, increases in the die/HS thermal resistance will have only small effects on the time constant of the die, but will cause the die to get hotter. You'll have to figure the values for your board to see if this is the case.