Electronic – DDR3 Series Termination Length Matching

ddr3termination

I am implementing a DDR3 interface on a PCB and I have a question regarding the termination of address/control/command/clk traces.

I have series terminations for all the required traces mentioned above, my question is whether or not the traces going to these terminations require length matching or should they just be kept as short as possible and left as uneven termination stubs? To me it makes sense to keep them as short as possible even if lengths aren't matched well, but I wanted some other opinions on the matter 🙂

Thanks!

Best Answer

I was still unable to find a solid written answer in the JEDEC specification or in design guides but after looking through some reference designs I found that termination resistors are always placed as close as possible to the final signal pin (last ram chip).