I have a sensor interfaced to ADC but the Range I am getting is not enough, so now there are 2 options, Gain up the signal or Reduce ADC Gain.
But as I heard it, reducing ADC gain will cause more noisy output, but then, can't I argue that applying gain to input signal will also gain up noise. are there more aspects than these which will cause noise if I reduce ADC Vref as compared to gaining up signal.
Electronic – Decreasing ADC Reference vs. Amplifying signal
adcamplifierinstrumentation-amplifiernoisesignal-to-noise
Best Answer
If you reduce the ADC Vref you will reduce the step voltage size of each bit you read. A some point the bit voltage size is close to the noise level of the existing circuit. You then need to add much filtering if you want a steady ADC reading. You may not be able to reduce the noise in the existing circuit.
On the other hand if you create a new amplifier circuit and increase the level of the input signal you might be able to keep amplifier circuit noise low and keep the 1 bit voltage level well above the noise, (also using a higher Vref).
Note that the noise being compared here is the existing circuit noise, not the noise mixed in with the signal to be measured. Even the Vref voltage will have some small noise in it.