Electronic – Digital Logic Circuit

boolean-algebradigital-logiclogic-gates

Have a few problems with my assignment.

Ive derived a truth table and come up with this :

Can someone verify if the above is correct?

Ive then got these 2 logic expressions :

Y = A'D' + C'D' + B'D'

Z = D+ B

What I want to know is (if the above is correct) Is it possible to implement the above circuit using fewer logic gates?

You have a major mistake. Look carefully at U1A. It's a NAND gate. Go back and look up what a NAND gate does.

You seem to have the function of the other two gates right.

Same deal as Keelan's answer, but using a single 74xx00 series NAND chip (4 gates):

schematic

^{simulate this circuit – Schematic created using CircuitLab}

I'm pretty sure half a 7402 is all you need: use one gate to invert A and the other to NOR it with B:

schematic

^{simulate this circuit – Schematic created using CircuitLab}

 A   A'  B  |  Y
------------+----
 0   1   0  |  0
 0   1   1  |  0
 1   0   0  |  1
 1   0   1  |  0